[PATCH] [PATCH] [Thumb/Thumb2] Added restrictions on PC, LR, SP in the register list for PUSH/POP/LDM/STM

[Tim Northover]

I think this is splitting up the logic along confusing lines. Some checks are still in the parent switch, but others have been moved to the new validateRegListOperands function.

It looks like that split might be because they use subtarget predicates. If so, just make validateRegListOperands a member of ARMAsmParser.

Cheers.

Tim.

================
Comment at: lib/Target/ARM/AsmParser/ARMAsmParser.cpp:5816-5819
@@ +5815,6 @@
+
+  bool operator==(const RegListOperandRules &rhs) const {
+    return (OPcode == rhs.OPcode && AllowSP == rhs.AllowSP &&
+            AllowPC == rhs.AllowPC && AllowPCAndLR == rhs.AllowPCAndLR &&
+            AllowInITBlock == rhs.AllowInITBlock);
+  }
----------------
Isn't this the default?

http://reviews.llvm.org/D6090