[llvm] r222352 - [mips][microMIPS] Implement CodeGen support for 16-bit instruction ADDIUR2.

[Jozef Kolek]

Author: jkolek
Date: Wed Nov 19 07:23:58 2014
New Revision: 222352

URL: http://llvm.org/viewvc/llvm-project?rev=222352&view=rev
Log:
[mips][microMIPS] Implement CodeGen support for 16-bit instruction ADDIUR2.

Differential Revision: http://reviews.llvm.org/D5800

Modified:
    llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
    llvm/trunk/test/CodeGen/Mips/micromips-addiu.ll

Modified: llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td?rev=222352&r1=222351&r2=222352&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td Wed Nov 19 07:23:58 2014
@@ -31,6 +31,10 @@ def uimm4_andi : Operand<i32> {
   let EncoderMethod = "getUImm4AndValue";
 }
 
+def immSExtAddiur2 : ImmLeaf<i32, [{return Imm == 1 || Imm == -1 ||
+                                           ((Imm % 4 == 0) &&
+                                            Imm < 28 && Imm > 0);}]>;
+
 def immSExtAddius5 : ImmLeaf<i32, [{return Imm >= -8 && Imm <= 7;}]>;
 
 def immZExtAndi16 : ImmLeaf<i32,
@@ -528,6 +532,8 @@ let Predicates = [InMicroMips] in {
 // MicroMips arbitrary patterns that map to one or more instructions
 //===----------------------------------------------------------------------===//
 
+def : MipsPat<(add GPRMM16:$src, immSExtAddiur2:$imm),
+              (ADDIUR2_MM GPRMM16:$src, immSExtAddiur2:$imm)>;
 def : MipsPat<(add GPR32:$src, immSExtAddius5:$imm),
               (ADDIUS5_MM GPR32:$src, immSExtAddius5:$imm)>;
 def : MipsPat<(add GPR32:$src, immSExt16:$imm),

Modified: llvm/trunk/test/CodeGen/Mips/micromips-addiu.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/micromips-addiu.ll?rev=222352&r1=222351&r2=222352&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/micromips-addiu.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/micromips-addiu.ll Wed Nov 19 07:23:58 2014
@@ -3,6 +3,7 @@
 
 @x = global i32 65504, align 4
 @y = global i32 60929, align 4
+ at z = global i32 60929, align 4
 @.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1
 
 define i32 @main() nounwind {
@@ -16,6 +17,11 @@ entry:
   %addiu2 = add i32 %1, 55
   %call2 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds
                                   ([7 x i8]* @.str, i32 0, i32 0), i32 %addiu2)
+
+  %2 = load i32* @z, align 4
+  %addiu3 = add i32 %2, 24
+  %call3 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds
+                                  ([7 x i8]* @.str, i32 0, i32 0), i32 %addiu3)
   ret i32 0
 }
 
@@ -23,3 +29,4 @@ declare i32 @printf(i8*, ...)
 
 ; CHECK: addius5  ${{[0-9]+}}, -7
 ; CHECK: addiu    ${{[0-9]+}}, ${{[0-9]+}}, 55
+; CHECK: addiur2  ${{[2-7]|16|17}}, ${{[2-7]|16|17}}, 24