[llvm] r222263 - [Hexagon] Adding A2_sub instruction

[Colin LeMahieu]

Author: colinl
Date: Tue Nov 18 15:51:51 2014
New Revision: 222263

URL: http://llvm.org/viewvc/llvm-project?rev=222263&view=rev
Log:
[Hexagon] Adding A2_sub instruction
Renaming test files.

Added:
    llvm/trunk/test/MC/Hexagon/inst_add.ll
    llvm/trunk/test/MC/Hexagon/inst_sub.ll
Removed:
    llvm/trunk/test/MC/Hexagon/instructions.ll
Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.td

Modified: llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.td?rev=222263&r1=222262&r2=222263&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.td Tue Nov 18 15:51:51 2014
@@ -162,6 +162,7 @@ multiclass T_ALU32_3op_A2<string mnemoni
 
 let isCodeGenOnly = 0 in
 defm add : T_ALU32_3op_A2<"add", 0b011, 0b000, 0, 1>;
+defm sub : T_ALU32_3op_A2<"sub", 0b011, 0b001, 1, 0>;
 
 // Pats for instruction selection.
 class BinOp32_pat<SDNode Op, InstHexagon MI, ValueType ResT>
@@ -169,6 +170,7 @@ class BinOp32_pat<SDNode Op, InstHexagon
         (ResT (MI IntRegs:$Rs, IntRegs:$Rt))>;
 
 def: BinOp32_pat<add, A2_add, i32>;
+def: BinOp32_pat<sub, A2_sub, i32>;
 
 multiclass ALU32_Pbase<string mnemonic, RegisterClass RC, bit isNot,
                        bit isPredNew> {

Added: llvm/trunk/test/MC/Hexagon/inst_add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/inst_add.ll?rev=222263&view=auto
==============================================================================
--- llvm/trunk/test/MC/Hexagon/inst_add.ll (added)
+++ llvm/trunk/test/MC/Hexagon/inst_add.ll Tue Nov 18 15:51:51 2014
@@ -0,0 +1,10 @@
+;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \
+;; RUN: | llvm-objdump -s - | FileCheck %s
+
+define i32 @foo (i32 %a, i32 %b)
+{
+  %1 = add i32 %a, %b
+  ret i32 %1
+}
+
+; CHECK:  0000 004100f3 00c09f52
\ No newline at end of file

Added: llvm/trunk/test/MC/Hexagon/inst_sub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/inst_sub.ll?rev=222263&view=auto
==============================================================================
--- llvm/trunk/test/MC/Hexagon/inst_sub.ll (added)
+++ llvm/trunk/test/MC/Hexagon/inst_sub.ll Tue Nov 18 15:51:51 2014
@@ -0,0 +1,10 @@
+;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \
+;; RUN: | llvm-objdump -s - | FileCheck %s
+
+define i32 @foo (i32 %a, i32 %b)
+{
+  %1 = sub i32 %a, %b
+  ret i32 %1
+}
+
+; CHECK:  0000 004021f3 00c09f52
\ No newline at end of file

Removed: llvm/trunk/test/MC/Hexagon/instructions.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/instructions.ll?rev=222262&view=auto
==============================================================================
--- llvm/trunk/test/MC/Hexagon/instructions.ll (original)
+++ llvm/trunk/test/MC/Hexagon/instructions.ll (removed)
@@ -1,10 +0,0 @@
-;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \
-;; RUN: | llvm-objdump -s - | FileCheck %s
-
-define i32 @foo (i32 %a, i32 %b)
-{
-  %1 = add i32 %a, %b
-  ret i32 %1
-}
-
-; CHECK:  0000 004100f3 00c09f52
\ No newline at end of file