[PATCH] [AArch64] Don't combine "select (setcc i1 LHS, RHS), vL, vR".

[Ahmed Bougacha]

Hi t.p.northover,

r208210 introduced an optimization that improves the vector select
codegen by doing the setcc on vectors directly.
This is a problem when the setcc operands are i1s, because the
optimization would create vectors of i1, which aren't legal.

Part of PR21549.

http://reviews.llvm.org/D6308

Files:
  lib/Target/AArch64/AArch64ISelLowering.cpp
  test/CodeGen/AArch64/arm64-neon-select_cc.ll
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