[PATCH] R600/SI: Fix definition for s_cselect_b32

Marek Olšák maraeo at gmail.com
Fri Nov 14 13:21:56 PST 2014


Hi Matt,

Why didn't you use SOP2_32 and Uses = [SCC] instead of adding another
SOP2 class?

Marek

On Thu, Nov 13, 2014 at 5:19 PM, Tom Stellard <tom at stellard.net> wrote:
> On Fri, Oct 24, 2014 at 02:11:27AM +0000, Matt Arsenault wrote:
>> These were directly using the old base instruction
>> class, and specifying the wrong register classes
>> for operands. The operands can be the other special
>> inputs besides SGPRs. The op name was also being
>> directly used for the asm string, so this was printed
>> without any operands.
>>
>
> LGTM.
>
>> http://reviews.llvm.org/D5954
>>
>> Files:
>>   lib/Target/R600/SIInstrInfo.td
>>   lib/Target/R600/SIInstructions.td
>
>> Index: lib/Target/R600/SIInstrInfo.td
>> ===================================================================
>> --- lib/Target/R600/SIInstrInfo.td
>> +++ lib/Target/R600/SIInstrInfo.td
>> @@ -340,6 +340,11 @@
>>    opName#" $dst, $src0, $src1", pattern
>>  >;
>>
>> +class SOP2_SELECT_32 <bits<7> op, string opName, list<dag> pattern> : SOP2 <
>> +  op, (outs SReg_32:$dst), (ins SSrc_32:$src0, SSrc_32:$src1, SCCReg:$scc),
>> +  opName#" $dst, $src0, $src1 [$scc]", pattern
>> +>;
>> +
>>  class SOP2_64 <bits<7> op, string opName, list<dag> pattern> : SOP2 <
>>    op, (outs SReg_64:$dst), (ins SSrc_64:$src0, SSrc_64:$src1),
>>    opName#" $dst, $src0, $src1", pattern
>> Index: lib/Target/R600/SIInstructions.td
>> ===================================================================
>> --- lib/Target/R600/SIInstructions.td
>> +++ lib/Target/R600/SIInstructions.td
>> @@ -214,9 +214,8 @@
>>    [(set i32:$dst, (AMDGPUumax i32:$src0, i32:$src1))]
>>  >;
>>
>> -def S_CSELECT_B32 : SOP2 <
>> -  0x0000000a, (outs SReg_32:$dst),
>> -  (ins SReg_32:$src0, SReg_32:$src1, SCCReg:$scc), "S_CSELECT_B32",
>> +def S_CSELECT_B32 : SOP2_SELECT_32 <
>> +  0x0000000a, "S_CSELECT_B32",
>>    []
>>  >;
>>
>
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