[PATCH] Change order of tablegen generated fastisel instruction code to be based on instruction complexity

[Bill Seurer]

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Comment at: /home/seurer/llvm/llvm-oneoff/utils/TableGen/FastISelEmitter.cpp:595
@@ -570,2 +594,3 @@
 
-    SimplePatterns[Operands][OpcodeName][VT][RetVT][PredicateCheck] = Memo;
+// This was used when testing
+//    if (SimplePatterns[Operands][OpcodeName][VT][RetVT].count(complexity)) {
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echristo wrote:
> seurer wrote:
> > echristo wrote:
> > > Is there a reason we either a) don't want this on by default, or b) would never want this on?
> > When I tried it generated over 150 warnings so it's probably just too noisy.  I wasn't sure if multiple patterns having the same complexity could be a potential issue, though.
> Yeah, I don't think so. Go ahead and just delete the commented out code with a "Two patterns could have the same complexity and we just end up picking the first one" or something like that. (I think it's the first one at this point?)
They all will still be generated because the predicates are different.  I believe the order will be the order in which they are encountered.

"When iterating over a std::multimap the elements are ordered by key, but the order of elements having the same key is not specified."

Hmmm, maybe not.

http://reviews.llvm.org/D6220