[PATCH] Change order of tablegen generated fastisel instruction code to be based on instruction complexity

[Eric Christopher]

Couple of inline comments.

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Comment at: /home/seurer/llvm/llvm-oneoff/utils/TableGen/FastISelEmitter.cpp:595
@@ -570,2 +594,3 @@
 
-    SimplePatterns[Operands][OpcodeName][VT][RetVT][PredicateCheck] = Memo;
+// This was used when testing
+//    if (SimplePatterns[Operands][OpcodeName][VT][RetVT].count(complexity)) {
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Is there a reason we either a) don't want this on by default, or b) would never want this on?

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Comment at: /home/seurer/llvm/llvm-oneoff/utils/TableGen/FastISelEmitter.cpp:648
@@ +647,3 @@
+      if (OneHadNoPredicate) {
+        // FIXME: This sould be a PrintError once the x86 target fixes
+        //     name:VBROADCASTSSZr  predicate: (Subtarget->hasAVX512()) 
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Can you file a bug for this and then link the PR?

http://reviews.llvm.org/D6220