[llvm] r221921 - R600/SI: Fix definition for s_cselect_b32
Matt Arsenault
Matthew.Arsenault at amd.com
Thu Nov 13 12:23:36 PST 2014
Author: arsenm
Date: Thu Nov 13 14:23:36 2014
New Revision: 221921
URL: http://llvm.org/viewvc/llvm-project?rev=221921&view=rev
Log:
R600/SI: Fix definition for s_cselect_b32
These were directly using the old base instruction
class, and specifying the wrong register classes
for operands. The operands can be the other special
inputs besides SGPRs. The op name was also being
directly used for the asm string, so this was printed
without any operands.
Modified:
llvm/trunk/lib/Target/R600/SIInstrInfo.td
llvm/trunk/lib/Target/R600/SIInstructions.td
Modified: llvm/trunk/lib/Target/R600/SIInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstrInfo.td?rev=221921&r1=221920&r2=221921&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstrInfo.td (original)
+++ llvm/trunk/lib/Target/R600/SIInstrInfo.td Thu Nov 13 14:23:36 2014
@@ -340,6 +340,11 @@ class SOP2_32 <bits<7> op, string opName
opName#" $dst, $src0, $src1", pattern
>;
+class SOP2_SELECT_32 <bits<7> op, string opName, list<dag> pattern> : SOP2 <
+ op, (outs SReg_32:$dst), (ins SSrc_32:$src0, SSrc_32:$src1, SCCReg:$scc),
+ opName#" $dst, $src0, $src1 [$scc]", pattern
+>;
+
class SOP2_64 <bits<7> op, string opName, list<dag> pattern> : SOP2 <
op, (outs SReg_64:$dst), (ins SSrc_64:$src0, SSrc_64:$src1),
opName#" $dst, $src0, $src1", pattern
Modified: llvm/trunk/lib/Target/R600/SIInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstructions.td?rev=221921&r1=221920&r2=221921&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstructions.td (original)
+++ llvm/trunk/lib/Target/R600/SIInstructions.td Thu Nov 13 14:23:36 2014
@@ -214,9 +214,8 @@ def S_MAX_U32 : SOP2_32 <0x00000009, "s_
[(set i32:$dst, (AMDGPUumax i32:$src0, i32:$src1))]
>;
-def S_CSELECT_B32 : SOP2 <
- 0x0000000a, (outs SReg_32:$dst),
- (ins SReg_32:$src0, SReg_32:$src1, SCCReg:$scc), "s_cselect_b32",
+def S_CSELECT_B32 : SOP2_SELECT_32 <
+ 0x0000000a, "s_cselect_b32",
[]
>;
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