[PATCH] [X86] Refactor PMOV[SZ]Xrm to add missing AVX2 patterns.

[Ahmed Bougacha]

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Comment at: lib/Target/X86/X86InstrSSE.td:6168
@@ +6167,3 @@
+  def : Pat<(v16i16 (ExtOp (v32i8 VR256:$src))),
+            (!cast<I>(OpcPrefix#BWYrr) (EXTRACT_SUBREG VR256:$src, sub_xmm))>;
+  def : Pat<(v8i32 (ExtOp (v32i8 VR256:$src))),
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delena wrote:
> Why v32i8 ? How do you get it? If you have v8i8 it will be legalized to v8i32 or v8i16.
> I think you have a lot of redundant patterns.
Good point, lots of the patterns are unusual but were there before. So I started investigating, there's years of cruft behind them. Notably:

PR14887/r172353 added the VR256 AVX2 patterns, but they don't seem useful (anymore?)

r56594 added the vzmovl/vzload patterns, and I'm not sure if we want those: they fire on the sse41.ll tests, but I don't know how common these are. For now I left those patterns there, but we have to decide whether to keep those tests. In that case we need to cover all of the patterns of the form:


  # load from an int type of the same size as the source vector
  # insert elements into enough lanes to fill the register
  # bitcast into the intrinsics expected input type
  # intrinsic call

http://reviews.llvm.org/D6125