[PATCH] R600/SI: Start implementing an assembler

[Tom Stellard]

On Thu, Nov 06, 2014 at 11:28:48AM -0800, Matt Arsenault wrote:
> 
> > On Nov 5, 2014, at 8:05 PM, Tom Stellard <thomas.stellard at amd.com> wrote:
> > 
> > This was done using PowerPCAsmParser as a guide.  So far it is very
> > simple and only supports a few sopp instructions.
> > ---
> > lib/Target/R600/AMDGPU.td                     |   7 +
> > lib/Target/R600/AMDGPUInstructions.td         |   2 +
> > lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp | 224 ++++++++++++++++++++++++++
> > lib/Target/R600/AsmParser/CMakeLists.txt      |   3 +
> > lib/Target/R600/AsmParser/LLVMBuild.txt       |  23 +++
> > lib/Target/R600/AsmParser/Makefile            |  15 ++
> > lib/Target/R600/CMakeLists.txt                |   2 +
> > lib/Target/R600/LLVMBuild.txt                 |   5 +-
> > lib/Target/R600/Makefile                      |   4 +-
> > lib/Target/R600/R600InstrFormats.td           |   3 +
> > lib/Target/R600/R600Instructions.td           |   1 +
> > lib/Target/R600/SIInstrFormats.td             |   3 +-
> > lib/Target/R600/SIInstructions.td             |  40 ++---
> > test/MC/R600/lit.local.cfg                    |   2 +
> > test/MC/R600/sopp.s                           |  23 +++
> > 15 files changed, 332 insertions(+), 25 deletions(-)
> > create mode 100644 lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp
> > create mode 100644 lib/Target/R600/AsmParser/CMakeLists.txt
> > create mode 100644 lib/Target/R600/AsmParser/LLVMBuild.txt
> > create mode 100644 lib/Target/R600/AsmParser/Makefile
> > create mode 100644 test/MC/R600/lit.local.cfg
> > create mode 100644 test/MC/R600/sopp.s
> > 
> > diff --git a/lib/Target/R600/AMDGPU.td b/lib/Target/R600/AMDGPU.td
> > index f5930f5..4cf1243 100644
> > --- a/lib/Target/R600/AMDGPU.td
> > +++ b/lib/Target/R600/AMDGPU.td
> > @@ -153,9 +153,16 @@ def AMDGPUInstrInfo : InstrInfo {
> >   let guessInstructionProperties = 1;
> > }
> > 
> > +def AMDGPUAsmParser : AsmParser {
> > +  // Some of the R600 registers have the same name, so this crashes.
> > +  // For example T0_XYZW and T0_XY both have the asm name T0.
> > +  let ShouldEmitMatchRegisterName = 0;
> > +}
> > +
> > def AMDGPU : Target {
> >   // Pull in Instruction Info:
> >   let InstructionSet = AMDGPUInstrInfo;
> > +  let AssemblyParsers = [AMDGPUAsmParser];
> > }
> > 
> > // Dummy Instruction itineraries for pseudo instructions
> > diff --git a/lib/Target/R600/AMDGPUInstructions.td b/lib/Target/R600/AMDGPUInstructions.td
> > index ba5630e..c215865 100644
> > --- a/lib/Target/R600/AMDGPUInstructions.td
> > +++ b/lib/Target/R600/AMDGPUInstructions.td
> > @@ -23,6 +23,8 @@ class AMDGPUInst <dag outs, dag ins, string asm, list<dag> pattern> : Instructio
> >   let Pattern = pattern;
> >   let Itinerary = NullALU;
> > 
> > +  let isCodeGenOnly = 1;
> > +
> >   let TSFlags{63} = isRegisterLoad;
> >   let TSFlags{62} = isRegisterStore;
> > }
> > diff --git a/lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp b/lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp
> > new file mode 100644
> > index 0000000..7331e7e
> > --- /dev/null
> > +++ b/lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp
> > @@ -0,0 +1,224 @@
> > +//===-- AMDGPUAsmParser.cpp - Parse R600 asm to MCInst instructions ---------===//
> Should this really be SIAsmParser?
> 

TableGen expects the class to be called AMDGPUAsmParser.cpp, but I changed the
comment from R600 asm to SI asm.

The attached patches addresses your other concerns and implements the
parser for all sopp instructions including the special syntax for
s_waitcnt.

-Tom
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