[llvm] r221780 - [mips][micromips] Add predicate 'InMicroMips' at CodeGen patterns for microMIPS instructions

[Zoran Jovanovic]

Author: zjovanovic
Date: Wed Nov 12 07:30:10 2014
New Revision: 221780

URL: http://llvm.org/viewvc/llvm-project?rev=221780&view=rev
Log:
[mips][micromips] Add predicate 'InMicroMips' at CodeGen patterns for microMIPS instructions
Differential Revision: http://reviews.llvm.org/D6198

Added:
    llvm/trunk/test/CodeGen/Mips/Fast-ISel/shift.ll
Modified:
    llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td

Modified: llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td?rev=221780&r1=221779&r2=221780&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td Wed Nov 12 07:30:10 2014
@@ -510,6 +510,8 @@ let DecoderNamespace = "MicroMips", Pred
   def TLBWR_MM : MMRel, TLB<"tlbwr">, COP0_TLB_FM_MM<0xcd>;
 }
 
+let Predicates = [InMicroMips] in {
+
 //===----------------------------------------------------------------------===//
 // MicroMips arbitrary patterns that map to one or more instructions
 //===----------------------------------------------------------------------===//
@@ -533,6 +535,5 @@ def : MipsPat<(srl GPR32:$src, immZExt5:
 // MicroMips instruction aliases
 //===----------------------------------------------------------------------===//
 
-let Predicates = [InMicroMips] in {
   def : MipsInstAlias<"wait", (WAIT_MM 0x0), 1>;
 }

Added: llvm/trunk/test/CodeGen/Mips/Fast-ISel/shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/shift.ll?rev=221780&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/shift.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/shift.ll Wed Nov 12 07:30:10 2014
@@ -0,0 +1,24 @@
+; RUN: llc -march=mipsel -mcpu=mips32r2 -O1 -fast-isel=true -mips-fast-isel -filetype=obj %s -o - \
+; RUN:   | llvm-objdump -arch mipsel -mcpu=mips32r2 -d - | FileCheck %s
+
+; This test checks that encoding for srl is correct when fast-isel for mips32r2 is used.
+
+%struct.s = type { [4 x i8], i32 }
+
+define i32 @main() nounwind uwtable {
+entry:
+  %foo = alloca %struct.s, align 4
+  %0 = bitcast %struct.s* %foo to i32*
+  %bf.load = load i32* %0, align 4
+  %bf.lshr = lshr i32 %bf.load, 2
+  %cmp = icmp ne i32 %bf.lshr, 2
+  br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+  unreachable
+
+if.end:
+  ret i32 0
+}
+
+; CHECK: srl    ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}}