[PATCH] [PowerPC] Add vec_vsx_ld and vec_vsx_st intrinsics

[hfinkel at anl.gov]

With updates as noted, LGTM.

================
Comment at: lib/Target/PowerPC/PPCInstrVSX.td:58
@@ -57,3 +57,3 @@
                          "lxvd2x $XT, $src", IIC_LdStLFD,
-                         [(set v2f64:$XT, (load xoaddr:$src))]>;
+                         [(set v2f64:$XT, (int_ppc_vsx_lxvd2x xoaddr:$src))]>;
 
----------------
FYI: Changing these, I believe, is what is changing the schedule. The matching pattern order treats patterns attached to instructions in a different order from free patterns (and the inferred attributes could also be different -- although they shouldn't be in this case).

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Comment at: lib/Transforms/InstCombine/InstCombineCalls.cpp:621
@@ +620,3 @@
+                                        PointerType::getUnqual(II->getType()));
+    return new LoadInst(Ptr);
+  }
----------------
This will create a load with the default alignment, but that's not right. These need to be align 1.

Also, you're missing tests for these.

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Comment at: lib/Transforms/InstCombine/InstCombineCalls.cpp:639
@@ +638,3 @@
+    Value *Ptr = Builder->CreateBitCast(II->getArgOperand(1), OpPtrTy);
+    return new StoreInst(II->getArgOperand(0), Ptr);
+  }
----------------
(Same comments as above)

http://reviews.llvm.org/D6143