[llvm] r221672 - [X86] Fix pattern match for 32-to-64-bit zext in the presence of AssertSext

[Michael Kuperstein]

Author: mkuper
Date: Tue Nov 11 01:07:40 2014
New Revision: 221672

URL: http://llvm.org/viewvc/llvm-project?rev=221672&view=rev
Log:
[X86] Fix pattern match for 32-to-64-bit zext in the presence of AssertSext

This fixes an issue with matching trunc -> assertsext -> zext on x86-64, which would not zero the high 32-bits. See PR20494 for details.
Recommitting - This time, with a hopefully working test.

Differential Revision: http://reviews.llvm.org/D6128

Added:
    llvm/trunk/test/CodeGen/X86/TruncAssertZext.ll
      - copied, changed from r221628, llvm/trunk/test/CodeGen/X86/TruncAssertZext.ll
Modified:
    llvm/trunk/lib/Target/X86/X86InstrCompiler.td

Modified: llvm/trunk/lib/Target/X86/X86InstrCompiler.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrCompiler.td?rev=221672&r1=221671&r2=221672&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrCompiler.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrCompiler.td Tue Nov 11 01:07:40 2014
@@ -1191,6 +1191,7 @@ def def32 : PatLeaf<(i32 GR32:$src), [{
   return N->getOpcode() != ISD::TRUNCATE &&
          N->getOpcode() != TargetOpcode::EXTRACT_SUBREG &&
          N->getOpcode() != ISD::CopyFromReg &&
+         N->getOpcode() != ISD::AssertSext &&
          N->getOpcode() != X86ISD::CMOV;
 }]>;
 

Copied: llvm/trunk/test/CodeGen/X86/TruncAssertZext.ll (from r221628, llvm/trunk/test/CodeGen/X86/TruncAssertZext.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/TruncAssertZext.ll?p2=llvm/trunk/test/CodeGen/X86/TruncAssertZext.ll&p1=llvm/trunk/test/CodeGen/X86/TruncAssertZext.ll&r1=221628&r2=221672&rev=221672&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/TruncAssertZext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/TruncAssertZext.ll Tue Nov 11 01:07:40 2014
@@ -5,7 +5,7 @@
 
 define i64 @main(i64 %a) { 
 ; CHECK-LABEL: main
-; CHECK: movl %ecx, %eax
+; CHECK: movl %e{{..}}, %eax
 ; CHECK: ret
   %or = or i64 %a, -2
   %trunc = trunc i64 %or to i32