[llvm] r221639 - [yaml2obj] Support AArch64 relocations.
Chad Rosier
mcrosier at codeaurora.org
Mon Nov 10 15:02:04 PST 2014
Author: mcrosier
Date: Mon Nov 10 17:02:03 2014
New Revision: 221639
URL: http://llvm.org/viewvc/llvm-project?rev=221639&view=rev
Log:
[yaml2obj] Support AArch64 relocations.
Patch by Daniel Stewart <stewartd at codeaurora.org>!
Phabricator Revision: http://reviews.llvm.org/D6192
Added:
llvm/trunk/test/Object/AArch64/
llvm/trunk/test/Object/AArch64/yaml2obj-elf-aarch64-rel.yaml
Modified:
llvm/trunk/lib/Object/ELFYAML.cpp
Modified: llvm/trunk/lib/Object/ELFYAML.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Object/ELFYAML.cpp?rev=221639&r1=221638&r2=221639&view=diff
==============================================================================
--- llvm/trunk/lib/Object/ELFYAML.cpp (original)
+++ llvm/trunk/lib/Object/ELFYAML.cpp Mon Nov 10 17:02:03 2014
@@ -672,6 +672,92 @@ void ScalarEnumerationTraits<ELFYAML::EL
ECase(R_386_IRELATIVE)
ECase(R_386_NUM)
break;
+ case ELF::EM_AARCH64:
+ ECase(R_AARCH64_NONE)
+ ECase(R_AARCH64_ABS64)
+ ECase(R_AARCH64_ABS32)
+ ECase(R_AARCH64_ABS16)
+ ECase(R_AARCH64_PREL64)
+ ECase(R_AARCH64_PREL32)
+ ECase(R_AARCH64_PREL16)
+ ECase(R_AARCH64_MOVW_UABS_G0)
+ ECase(R_AARCH64_MOVW_UABS_G0_NC)
+ ECase(R_AARCH64_MOVW_UABS_G1)
+ ECase(R_AARCH64_MOVW_UABS_G1_NC)
+ ECase(R_AARCH64_MOVW_UABS_G2)
+ ECase(R_AARCH64_MOVW_UABS_G2_NC)
+ ECase(R_AARCH64_MOVW_UABS_G3)
+ ECase(R_AARCH64_MOVW_SABS_G0)
+ ECase(R_AARCH64_MOVW_SABS_G1)
+ ECase(R_AARCH64_MOVW_SABS_G2)
+ ECase(R_AARCH64_LD_PREL_LO19)
+ ECase(R_AARCH64_ADR_PREL_LO21)
+ ECase(R_AARCH64_ADR_PREL_PG_HI21)
+ ECase(R_AARCH64_ADD_ABS_LO12_NC)
+ ECase(R_AARCH64_LDST8_ABS_LO12_NC)
+ ECase(R_AARCH64_TSTBR14)
+ ECase(R_AARCH64_CONDBR19)
+ ECase(R_AARCH64_JUMP26)
+ ECase(R_AARCH64_CALL26)
+ ECase(R_AARCH64_LDST16_ABS_LO12_NC)
+ ECase(R_AARCH64_LDST32_ABS_LO12_NC)
+ ECase(R_AARCH64_LDST64_ABS_LO12_NC)
+ ECase(R_AARCH64_LDST128_ABS_LO12_NC)
+ ECase(R_AARCH64_GOTREL64)
+ ECase(R_AARCH64_GOTREL32)
+ ECase(R_AARCH64_ADR_GOT_PAGE)
+ ECase(R_AARCH64_LD64_GOT_LO12_NC)
+ ECase(R_AARCH64_TLSLD_MOVW_DTPREL_G2)
+ ECase(R_AARCH64_TLSLD_MOVW_DTPREL_G1)
+ ECase(R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC)
+ ECase(R_AARCH64_TLSLD_MOVW_DTPREL_G0)
+ ECase(R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC)
+ ECase(R_AARCH64_TLSLD_ADD_DTPREL_HI12)
+ ECase(R_AARCH64_TLSLD_ADD_DTPREL_LO12)
+ ECase(R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC)
+ ECase(R_AARCH64_TLSLD_LDST8_DTPREL_LO12)
+ ECase(R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC)
+ ECase(R_AARCH64_TLSLD_LDST16_DTPREL_LO12)
+ ECase(R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC)
+ ECase(R_AARCH64_TLSLD_LDST32_DTPREL_LO12)
+ ECase(R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC)
+ ECase(R_AARCH64_TLSLD_LDST64_DTPREL_LO12)
+ ECase(R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC)
+ ECase(R_AARCH64_TLSIE_MOVW_GOTTPREL_G1)
+ ECase(R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC)
+ ECase(R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21)
+ ECase(R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC)
+ ECase(R_AARCH64_TLSIE_LD_GOTTPREL_PREL19)
+ ECase(R_AARCH64_TLSLE_MOVW_TPREL_G2)
+ ECase(R_AARCH64_TLSLE_MOVW_TPREL_G1)
+ ECase(R_AARCH64_TLSLE_MOVW_TPREL_G1_NC)
+ ECase(R_AARCH64_TLSLE_MOVW_TPREL_G0)
+ ECase(R_AARCH64_TLSLE_MOVW_TPREL_G0_NC)
+ ECase(R_AARCH64_TLSLE_ADD_TPREL_HI12)
+ ECase(R_AARCH64_TLSLE_ADD_TPREL_LO12)
+ ECase(R_AARCH64_TLSLE_ADD_TPREL_LO12_NC)
+ ECase(R_AARCH64_TLSLE_LDST8_TPREL_LO12)
+ ECase(R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC)
+ ECase(R_AARCH64_TLSLE_LDST16_TPREL_LO12)
+ ECase(R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC)
+ ECase(R_AARCH64_TLSLE_LDST32_TPREL_LO12)
+ ECase(R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC)
+ ECase(R_AARCH64_TLSLE_LDST64_TPREL_LO12)
+ ECase(R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC)
+ ECase(R_AARCH64_TLSDESC_ADR_PAGE)
+ ECase(R_AARCH64_TLSDESC_LD64_LO12_NC)
+ ECase(R_AARCH64_TLSDESC_ADD_LO12_NC)
+ ECase(R_AARCH64_TLSDESC_CALL)
+ ECase(R_AARCH64_COPY)
+ ECase(R_AARCH64_GLOB_DAT)
+ ECase(R_AARCH64_JUMP_SLOT)
+ ECase(R_AARCH64_RELATIVE)
+ ECase(R_AARCH64_TLS_DTPREL64)
+ ECase(R_AARCH64_TLS_DTPMOD64)
+ ECase(R_AARCH64_TLS_TPREL64)
+ ECase(R_AARCH64_TLSDESC)
+ ECase(R_AARCH64_IRELATIVE)
+ break;
default:
llvm_unreachable("Unsupported architecture");
}
Added: llvm/trunk/test/Object/AArch64/yaml2obj-elf-aarch64-rel.yaml
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Object/AArch64/yaml2obj-elf-aarch64-rel.yaml?rev=221639&view=auto
==============================================================================
--- llvm/trunk/test/Object/AArch64/yaml2obj-elf-aarch64-rel.yaml (added)
+++ llvm/trunk/test/Object/AArch64/yaml2obj-elf-aarch64-rel.yaml Mon Nov 10 17:02:03 2014
@@ -0,0 +1,47 @@
+# RUN: yaml2obj -format=elf %s > %t
+# RUN: obj2yaml %t | FileCheck %s
+
+# CHECK: - Name: .rela.text
+# CHECK-NEXT: Type: SHT_RELA
+# CHECK-NEXT: Link: .symtab
+# CHECK-NEXT: AddressAlign: 0x0000000000000008
+# CHECK-NEXT: Info: .text
+# CHECK-NEXT: Relocations:
+# CHECK-NEXT: - Offset: 0x0000000000000000
+# CHECK-NEXT: Symbol: main
+# CHECK-NEXT: Type: R_AARCH64_ABS64
+# CHECK-NEXT: Addend: 0
+
+FileHeader:
+ Class: ELFCLASS64
+ Data: ELFDATA2LSB
+ Type: ET_REL
+ Machine: EM_AARCH64
+Sections:
+ - Type: SHT_PROGBITS
+ Name: .text
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+ AddressAlign: 0x04
+ Content: 0000000000000000
+ - Type: SHT_RELA
+ Name: .rela.text
+ Link: .symtab
+ Info: .text
+ AddressAlign: 0x08
+ Relocations:
+ - Offset: 0
+ Symbol: main
+ Type: R_AARCH64_ABS64
+ Addend: 0
+
+Symbols:
+ Local:
+ - Name: .text
+ Type: STT_SECTION
+ Section: .text
+
+ Global:
+ - Name: main
+ Type: STT_FUNC
+ Section: .text
+ Size: 0x08
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