[llvm] r221615 - Misc style fixes. NFC.
Rafael Espindola
rafael.espindola at gmail.com
Mon Nov 10 10:11:10 PST 2014
Author: rafael
Date: Mon Nov 10 12:11:10 2014
New Revision: 221615
URL: http://llvm.org/viewvc/llvm-project?rev=221615&view=rev
Log:
Misc style fixes. NFC.
This fixes a few cases of:
* Wrong variable name style.
* Lines longer than 80 columns.
* Repeated names in comments.
* clang-format of the above.
This make the next patch a lot easier to read.
Modified:
llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.h
llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
llvm/trunk/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
llvm/trunk/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
llvm/trunk/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
llvm/trunk/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h
llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
Modified: llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp?rev=221615&r1=221614&r2=221615&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp Mon Nov 10 12:11:10 2014
@@ -200,26 +200,26 @@ static MCDisassembler *createAArch64Disa
}
DecodeStatus AArch64Disassembler::getInstruction(MCInst &MI, uint64_t &Size,
- const MemoryObject &Region,
- uint64_t Address,
- raw_ostream &os,
- raw_ostream &cs) const {
- CommentStream = &cs;
+ const MemoryObject &Region,
+ uint64_t Address,
+ raw_ostream &OS,
+ raw_ostream &CS) const {
+ CommentStream = &CS;
- uint8_t bytes[4];
+ uint8_t Bytes[4];
Size = 0;
// We want to read exactly 4 bytes of data.
- if (Region.readBytes(Address, 4, (uint8_t *)bytes) == -1)
+ if (Region.readBytes(Address, 4, Bytes) == -1)
return Fail;
Size = 4;
// Encoded as a small-endian 32-bit word in the stream.
- uint32_t insn =
- (bytes[3] << 24) | (bytes[2] << 16) | (bytes[1] << 8) | (bytes[0] << 0);
+ uint32_t Insn =
+ (Bytes[3] << 24) | (Bytes[2] << 16) | (Bytes[1] << 8) | (Bytes[0] << 0);
// Calling the auto-generated decoder function.
- return decodeInstruction(DecoderTable32, MI, insn, Address, this, STI);
+ return decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI);
}
static MCSymbolizer *
Modified: llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.h?rev=221615&r1=221614&r2=221615&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.h (original)
+++ llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.h Mon Nov 10 12:11:10 2014
@@ -28,11 +28,10 @@ public:
~AArch64Disassembler() {}
- /// getInstruction - See MCDisassembler.
MCDisassembler::DecodeStatus
- getInstruction(MCInst &instr, uint64_t &size, const MemoryObject ®ion,
- uint64_t address, raw_ostream &vStream,
- raw_ostream &cStream) const override;
+ getInstruction(MCInst &Instr, uint64_t &Size, const MemoryObject &Segion,
+ uint64_t Address, raw_ostream &VStream,
+ raw_ostream &CStream) const override;
};
} // namespace llvm
Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=221615&r1=221614&r2=221615&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Mon Nov 10 12:11:10 2014
@@ -85,42 +85,34 @@ namespace {
}
namespace {
-/// ARMDisassembler - ARM disassembler for all ARM platforms.
+/// ARM disassembler for all ARM platforms.
class ARMDisassembler : public MCDisassembler {
public:
- /// Constructor - Initializes the disassembler.
- ///
ARMDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) :
MCDisassembler(STI, Ctx) {
}
- ~ARMDisassembler() {
- }
+ ~ARMDisassembler() {}
- /// getInstruction - See MCDisassembler.
- DecodeStatus getInstruction(MCInst &instr, uint64_t &size,
- const MemoryObject ®ion, uint64_t address,
- raw_ostream &vStream,
- raw_ostream &cStream) const override;
+ DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
+ const MemoryObject &Region, uint64_t Address,
+ raw_ostream &VStream,
+ raw_ostream &CStream) const override;
};
-/// ThumbDisassembler - Thumb disassembler for all Thumb platforms.
+/// Thumb disassembler for all Thumb platforms.
class ThumbDisassembler : public MCDisassembler {
public:
- /// Constructor - Initializes the disassembler.
- ///
ThumbDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) :
MCDisassembler(STI, Ctx) {
}
- ~ThumbDisassembler() {
- }
+ ~ThumbDisassembler() {}
- /// getInstruction - See MCDisassembler.
- DecodeStatus getInstruction(MCInst &instr, uint64_t &size,
- const MemoryObject ®ion, uint64_t address,
- raw_ostream &vStream,
- raw_ostream &cStream) const override;
+ DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
+ const MemoryObject &Region, uint64_t Address,
+ raw_ostream &VStream,
+ raw_ostream &CStream) const override;
private:
mutable ITStatus ITBlock;
@@ -416,102 +408,100 @@ static MCDisassembler *createThumbDisass
DecodeStatus ARMDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
const MemoryObject &Region,
- uint64_t Address,
- raw_ostream &os,
- raw_ostream &cs) const {
- CommentStream = &cs;
+ uint64_t Address, raw_ostream &OS,
+ raw_ostream &CS) const {
+ CommentStream = &CS;
- uint8_t bytes[4];
+ uint8_t Bytes[4];
assert(!(STI.getFeatureBits() & ARM::ModeThumb) &&
- "Asked to disassemble an ARM instruction but Subtarget is in Thumb mode!");
+ "Asked to disassemble an ARM instruction but Subtarget is in Thumb "
+ "mode!");
// We want to read exactly 4 bytes of data.
- if (Region.readBytes(Address, 4, bytes) == -1) {
+ if (Region.readBytes(Address, 4, Bytes) == -1) {
Size = 0;
return MCDisassembler::Fail;
}
// Encoded as a small-endian 32-bit word in the stream.
- uint32_t insn = (bytes[3] << 24) |
- (bytes[2] << 16) |
- (bytes[1] << 8) |
- (bytes[0] << 0);
+ uint32_t Insn =
+ (Bytes[3] << 24) | (Bytes[2] << 16) | (Bytes[1] << 8) | (Bytes[0] << 0);
// Calling the auto-generated decoder function.
- DecodeStatus result = decodeInstruction(DecoderTableARM32, MI, insn,
- Address, this, STI);
- if (result != MCDisassembler::Fail) {
+ DecodeStatus Result =
+ decodeInstruction(DecoderTableARM32, MI, Insn, Address, this, STI);
+ if (Result != MCDisassembler::Fail) {
Size = 4;
- return result;
+ return Result;
}
// VFP and NEON instructions, similarly, are shared between ARM
// and Thumb modes.
MI.clear();
- result = decodeInstruction(DecoderTableVFP32, MI, insn, Address, this, STI);
- if (result != MCDisassembler::Fail) {
+ Result = decodeInstruction(DecoderTableVFP32, MI, Insn, Address, this, STI);
+ if (Result != MCDisassembler::Fail) {
Size = 4;
- return result;
+ return Result;
}
MI.clear();
- result = decodeInstruction(DecoderTableVFPV832, MI, insn, Address, this, STI);
- if (result != MCDisassembler::Fail) {
+ Result = decodeInstruction(DecoderTableVFPV832, MI, Insn, Address, this, STI);
+ if (Result != MCDisassembler::Fail) {
Size = 4;
- return result;
+ return Result;
}
MI.clear();
- result = decodeInstruction(DecoderTableNEONData32, MI, insn, Address,
- this, STI);
- if (result != MCDisassembler::Fail) {
+ Result =
+ decodeInstruction(DecoderTableNEONData32, MI, Insn, Address, this, STI);
+ if (Result != MCDisassembler::Fail) {
Size = 4;
// Add a fake predicate operand, because we share these instruction
// definitions with Thumb2 where these instructions are predicable.
if (!DecodePredicateOperand(MI, 0xE, Address, this))
return MCDisassembler::Fail;
- return result;
+ return Result;
}
MI.clear();
- result = decodeInstruction(DecoderTableNEONLoadStore32, MI, insn, Address,
+ Result = decodeInstruction(DecoderTableNEONLoadStore32, MI, Insn, Address,
this, STI);
- if (result != MCDisassembler::Fail) {
+ if (Result != MCDisassembler::Fail) {
Size = 4;
// Add a fake predicate operand, because we share these instruction
// definitions with Thumb2 where these instructions are predicable.
if (!DecodePredicateOperand(MI, 0xE, Address, this))
return MCDisassembler::Fail;
- return result;
+ return Result;
}
MI.clear();
- result = decodeInstruction(DecoderTableNEONDup32, MI, insn, Address,
- this, STI);
- if (result != MCDisassembler::Fail) {
+ Result =
+ decodeInstruction(DecoderTableNEONDup32, MI, Insn, Address, this, STI);
+ if (Result != MCDisassembler::Fail) {
Size = 4;
// Add a fake predicate operand, because we share these instruction
// definitions with Thumb2 where these instructions are predicable.
if (!DecodePredicateOperand(MI, 0xE, Address, this))
return MCDisassembler::Fail;
- return result;
+ return Result;
}
MI.clear();
- result = decodeInstruction(DecoderTablev8NEON32, MI, insn, Address,
- this, STI);
- if (result != MCDisassembler::Fail) {
+ Result =
+ decodeInstruction(DecoderTablev8NEON32, MI, Insn, Address, this, STI);
+ if (Result != MCDisassembler::Fail) {
Size = 4;
- return result;
+ return Result;
}
MI.clear();
- result = decodeInstruction(DecoderTablev8Crypto32, MI, insn, Address,
- this, STI);
- if (result != MCDisassembler::Fail) {
+ Result =
+ decodeInstruction(DecoderTablev8Crypto32, MI, Insn, Address, this, STI);
+ if (Result != MCDisassembler::Fail) {
Size = 4;
- return result;
+ return Result;
}
MI.clear();
@@ -685,53 +675,53 @@ void ThumbDisassembler::UpdateThumbVFPPr
DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
const MemoryObject &Region,
uint64_t Address,
- raw_ostream &os,
- raw_ostream &cs) const {
- CommentStream = &cs;
+ raw_ostream &OS,
+ raw_ostream &CS) const {
+ CommentStream = &CS;
- uint8_t bytes[4];
+ uint8_t Bytes[4];
assert((STI.getFeatureBits() & ARM::ModeThumb) &&
"Asked to disassemble in Thumb mode but Subtarget is in ARM mode!");
// We want to read exactly 2 bytes of data.
- if (Region.readBytes(Address, 2, bytes) == -1) {
+ if (Region.readBytes(Address, 2, Bytes) == -1) {
Size = 0;
return MCDisassembler::Fail;
}
- uint16_t insn16 = (bytes[1] << 8) | bytes[0];
- DecodeStatus result = decodeInstruction(DecoderTableThumb16, MI, insn16,
- Address, this, STI);
- if (result != MCDisassembler::Fail) {
+ uint16_t Insn16 = (Bytes[1] << 8) | Bytes[0];
+ DecodeStatus Result =
+ decodeInstruction(DecoderTableThumb16, MI, Insn16, Address, this, STI);
+ if (Result != MCDisassembler::Fail) {
Size = 2;
- Check(result, AddThumbPredicate(MI));
- return result;
+ Check(Result, AddThumbPredicate(MI));
+ return Result;
}
MI.clear();
- result = decodeInstruction(DecoderTableThumbSBit16, MI, insn16,
- Address, this, STI);
- if (result) {
+ Result = decodeInstruction(DecoderTableThumbSBit16, MI, Insn16, Address, this,
+ STI);
+ if (Result) {
Size = 2;
bool InITBlock = ITBlock.instrInITBlock();
- Check(result, AddThumbPredicate(MI));
+ Check(Result, AddThumbPredicate(MI));
AddThumb1SBit(MI, InITBlock);
- return result;
+ return Result;
}
MI.clear();
- result = decodeInstruction(DecoderTableThumb216, MI, insn16,
- Address, this, STI);
- if (result != MCDisassembler::Fail) {
+ Result =
+ decodeInstruction(DecoderTableThumb216, MI, Insn16, Address, this, STI);
+ if (Result != MCDisassembler::Fail) {
Size = 2;
// Nested IT blocks are UNPREDICTABLE. Must be checked before we add
// the Thumb predicate.
if (MI.getOpcode() == ARM::t2IT && ITBlock.instrInITBlock())
- result = MCDisassembler::SoftFail;
+ Result = MCDisassembler::SoftFail;
- Check(result, AddThumbPredicate(MI));
+ Check(Result, AddThumbPredicate(MI));
// If we find an IT instruction, we need to parse its condition
// code and mask operands so that we can apply them correctly
@@ -743,115 +733,115 @@ DecodeStatus ThumbDisassembler::getInstr
ITBlock.setITState(Firstcond, Mask);
}
- return result;
+ return Result;
}
// We want to read exactly 4 bytes of data.
- if (Region.readBytes(Address, 4, bytes) == -1) {
+ if (Region.readBytes(Address, 4, Bytes) == -1) {
Size = 0;
return MCDisassembler::Fail;
}
- uint32_t insn32 = (bytes[3] << 8) |
- (bytes[2] << 0) |
- (bytes[1] << 24) |
- (bytes[0] << 16);
+ uint32_t Insn32 =
+ (Bytes[3] << 8) | (Bytes[2] << 0) | (Bytes[1] << 24) | (Bytes[0] << 16);
MI.clear();
- result = decodeInstruction(DecoderTableThumb32, MI, insn32, Address,
- this, STI);
- if (result != MCDisassembler::Fail) {
+ Result =
+ decodeInstruction(DecoderTableThumb32, MI, Insn32, Address, this, STI);
+ if (Result != MCDisassembler::Fail) {
Size = 4;
bool InITBlock = ITBlock.instrInITBlock();
- Check(result, AddThumbPredicate(MI));
+ Check(Result, AddThumbPredicate(MI));
AddThumb1SBit(MI, InITBlock);
- return result;
+ return Result;
}
MI.clear();
- result = decodeInstruction(DecoderTableThumb232, MI, insn32, Address,
- this, STI);
- if (result != MCDisassembler::Fail) {
+ Result =
+ decodeInstruction(DecoderTableThumb232, MI, Insn32, Address, this, STI);
+ if (Result != MCDisassembler::Fail) {
Size = 4;
- Check(result, AddThumbPredicate(MI));
- return result;
+ Check(Result, AddThumbPredicate(MI));
+ return Result;
}
- if (fieldFromInstruction(insn32, 28, 4) == 0xE) {
+ if (fieldFromInstruction(Insn32, 28, 4) == 0xE) {
MI.clear();
- result = decodeInstruction(DecoderTableVFP32, MI, insn32, Address, this, STI);
- if (result != MCDisassembler::Fail) {
+ Result =
+ decodeInstruction(DecoderTableVFP32, MI, Insn32, Address, this, STI);
+ if (Result != MCDisassembler::Fail) {
Size = 4;
UpdateThumbVFPPredicate(MI);
- return result;
+ return Result;
}
}
MI.clear();
- result = decodeInstruction(DecoderTableVFPV832, MI, insn32, Address, this, STI);
- if (result != MCDisassembler::Fail) {
+ Result =
+ decodeInstruction(DecoderTableVFPV832, MI, Insn32, Address, this, STI);
+ if (Result != MCDisassembler::Fail) {
Size = 4;
- return result;
+ return Result;
}
- if (fieldFromInstruction(insn32, 28, 4) == 0xE) {
+ if (fieldFromInstruction(Insn32, 28, 4) == 0xE) {
MI.clear();
- result = decodeInstruction(DecoderTableNEONDup32, MI, insn32, Address,
- this, STI);
- if (result != MCDisassembler::Fail) {
+ Result = decodeInstruction(DecoderTableNEONDup32, MI, Insn32, Address, this,
+ STI);
+ if (Result != MCDisassembler::Fail) {
Size = 4;
- Check(result, AddThumbPredicate(MI));
- return result;
+ Check(Result, AddThumbPredicate(MI));
+ return Result;
}
}
- if (fieldFromInstruction(insn32, 24, 8) == 0xF9) {
+ if (fieldFromInstruction(Insn32, 24, 8) == 0xF9) {
MI.clear();
- uint32_t NEONLdStInsn = insn32;
+ uint32_t NEONLdStInsn = Insn32;
NEONLdStInsn &= 0xF0FFFFFF;
NEONLdStInsn |= 0x04000000;
- result = decodeInstruction(DecoderTableNEONLoadStore32, MI, NEONLdStInsn,
+ Result = decodeInstruction(DecoderTableNEONLoadStore32, MI, NEONLdStInsn,
Address, this, STI);
- if (result != MCDisassembler::Fail) {
+ if (Result != MCDisassembler::Fail) {
Size = 4;
- Check(result, AddThumbPredicate(MI));
- return result;
+ Check(Result, AddThumbPredicate(MI));
+ return Result;
}
}
- if (fieldFromInstruction(insn32, 24, 4) == 0xF) {
+ if (fieldFromInstruction(Insn32, 24, 4) == 0xF) {
MI.clear();
- uint32_t NEONDataInsn = insn32;
+ uint32_t NEONDataInsn = Insn32;
NEONDataInsn &= 0xF0FFFFFF; // Clear bits 27-24
NEONDataInsn |= (NEONDataInsn & 0x10000000) >> 4; // Move bit 28 to bit 24
NEONDataInsn |= 0x12000000; // Set bits 28 and 25
- result = decodeInstruction(DecoderTableNEONData32, MI, NEONDataInsn,
+ Result = decodeInstruction(DecoderTableNEONData32, MI, NEONDataInsn,
Address, this, STI);
- if (result != MCDisassembler::Fail) {
+ if (Result != MCDisassembler::Fail) {
Size = 4;
- Check(result, AddThumbPredicate(MI));
- return result;
+ Check(Result, AddThumbPredicate(MI));
+ return Result;
}
MI.clear();
- uint32_t NEONCryptoInsn = insn32;
+ uint32_t NEONCryptoInsn = Insn32;
NEONCryptoInsn &= 0xF0FFFFFF; // Clear bits 27-24
NEONCryptoInsn |= (NEONCryptoInsn & 0x10000000) >> 4; // Move bit 28 to bit 24
NEONCryptoInsn |= 0x12000000; // Set bits 28 and 25
- result = decodeInstruction(DecoderTablev8Crypto32, MI, NEONCryptoInsn,
+ Result = decodeInstruction(DecoderTablev8Crypto32, MI, NEONCryptoInsn,
Address, this, STI);
- if (result != MCDisassembler::Fail) {
+ if (Result != MCDisassembler::Fail) {
Size = 4;
- return result;
+ return Result;
}
MI.clear();
- uint32_t NEONv8Insn = insn32;
+ uint32_t NEONv8Insn = Insn32;
NEONv8Insn &= 0xF3FFFFFF; // Clear bits 27-26
- result = decodeInstruction(DecoderTablev8NEON32, MI, NEONv8Insn, Address,
+ Result = decodeInstruction(DecoderTablev8NEON32, MI, NEONv8Insn, Address,
this, STI);
- if (result != MCDisassembler::Fail) {
+ if (Result != MCDisassembler::Fail) {
Size = 4;
- return result;
+ return Result;
}
}
Modified: llvm/trunk/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp?rev=221615&r1=221614&r2=221615&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp Mon Nov 10 12:11:10 2014
@@ -42,9 +42,10 @@ public:
HexagonDisassembler(MCSubtargetInfo const &STI, MCContext &Ctx)
: MCDisassembler(STI, Ctx) {}
- DecodeStatus getInstruction(MCInst &instr, uint64_t &size,
- MemoryObject const ®ion, uint64_t address,
- raw_ostream &vStream, raw_ostream &cStream) const override;
+ DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
+ MemoryObject const &Region, uint64_t Address,
+ raw_ostream &VStream,
+ raw_ostream &CStream) const override;
};
}
@@ -68,9 +69,9 @@ DecodeStatus HexagonDisassembler::getIns
raw_ostream &cs) const {
std::array<uint8_t, 4> Bytes;
Size = 4;
- if (Region.readBytes(Address, Bytes.size(), Bytes.data()) == -1) {
+ if (Region.readBytes(Address, Bytes.size(), Bytes.data()) == -1)
return MCDisassembler::Fail;
- }
+
uint32_t insn =
llvm::support::endian::read<uint32_t, llvm::support::little,
llvm::support::unaligned>(Bytes.data());
Modified: llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp?rev=221615&r1=221614&r2=221615&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp Mon Nov 10 12:11:10 2014
@@ -31,15 +31,14 @@ typedef MCDisassembler::DecodeStatus Dec
namespace {
-/// MipsDisassemblerBase - a disasembler class for Mips.
+/// A disasembler class for Mips.
class MipsDisassemblerBase : public MCDisassembler {
public:
- /// Constructor - Initializes the disassembler.
- ///
MipsDisassemblerBase(const MCSubtargetInfo &STI, MCContext &Ctx,
- bool bigEndian) :
- MCDisassembler(STI, Ctx),
- IsN64(STI.getFeatureBits() & Mips::FeatureN64), isBigEndian(bigEndian) {}
+ bool IsBigEndian)
+ : MCDisassembler(STI, Ctx),
+ IsN64(STI.getFeatureBits() & Mips::FeatureN64),
+ IsBigEndian(IsBigEndian) {}
virtual ~MipsDisassemblerBase() {}
@@ -48,15 +47,13 @@ public:
private:
bool IsN64;
protected:
- bool isBigEndian;
+ bool IsBigEndian;
};
-/// MipsDisassembler - a disasembler class for Mips32.
+/// A disasembler class for Mips32.
class MipsDisassembler : public MipsDisassemblerBase {
bool IsMicroMips;
public:
- /// Constructor - Initializes the disassembler.
- ///
MipsDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, bool bigEndian)
: MipsDisassemblerBase(STI, Ctx, bigEndian) {
IsMicroMips = STI.getFeatureBits() & Mips::FeatureMicroMips;
@@ -75,32 +72,23 @@ public:
return !hasMips32() && !hasMips3();
}
- /// getInstruction - See MCDisassembler.
- DecodeStatus getInstruction(MCInst &instr,
- uint64_t &size,
- const MemoryObject ®ion,
- uint64_t address,
- raw_ostream &vStream,
- raw_ostream &cStream) const override;
+ DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
+ const MemoryObject &Region, uint64_t Address,
+ raw_ostream &VStream,
+ raw_ostream &CStream) const override;
};
-
-/// Mips64Disassembler - a disasembler class for Mips64.
+/// A disasembler class for Mips64.
class Mips64Disassembler : public MipsDisassemblerBase {
public:
- /// Constructor - Initializes the disassembler.
- ///
Mips64Disassembler(const MCSubtargetInfo &STI, MCContext &Ctx,
bool bigEndian) :
MipsDisassemblerBase(STI, Ctx, bigEndian) {}
- /// getInstruction - See MCDisassembler.
- DecodeStatus getInstruction(MCInst &instr,
- uint64_t &size,
- const MemoryObject ®ion,
- uint64_t address,
- raw_ostream &vStream,
- raw_ostream &cStream) const override;
+ DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
+ const MemoryObject &Region, uint64_t Address,
+ raw_ostream &VStream,
+ raw_ostream &CStream) const override;
};
} // end anonymous namespace
@@ -709,43 +697,34 @@ static DecodeStatus DecodeBlezGroupBranc
return MCDisassembler::Success;
}
- /// readInstruction - read four bytes from the MemoryObject
- /// and return 32 bit word sorted according to the given endianess
-static DecodeStatus readInstruction32(const MemoryObject ®ion,
- uint64_t address,
- uint64_t &size,
- uint32_t &insn,
- bool isBigEndian,
+/// Read four bytes from the MemoryObject and return 32 bit word sorted
+/// according to the given endianess
+static DecodeStatus readInstruction32(const MemoryObject &Region,
+ uint64_t Address, uint64_t &Size,
+ uint32_t &Insn, bool IsBigEndian,
bool IsMicroMips) {
uint8_t Bytes[4];
// We want to read exactly 4 Bytes of data.
- if (region.readBytes(address, 4, Bytes) == -1) {
- size = 0;
+ if (Region.readBytes(Address, 4, Bytes) == -1) {
+ Size = 0;
return MCDisassembler::Fail;
}
- if (isBigEndian) {
+ if (IsBigEndian) {
// Encoded as a big-endian 32-bit word in the stream.
- insn = (Bytes[3] << 0) |
- (Bytes[2] << 8) |
- (Bytes[1] << 16) |
- (Bytes[0] << 24);
- }
- else {
+ Insn =
+ (Bytes[3] << 0) | (Bytes[2] << 8) | (Bytes[1] << 16) | (Bytes[0] << 24);
+ } else {
// Encoded as a small-endian 32-bit word in the stream.
// Little-endian byte ordering:
// mips32r2: 4 | 3 | 2 | 1
// microMIPS: 2 | 1 | 4 | 3
if (IsMicroMips) {
- insn = (Bytes[2] << 0) |
- (Bytes[3] << 8) |
- (Bytes[0] << 16) |
+ Insn = (Bytes[2] << 0) | (Bytes[3] << 8) | (Bytes[0] << 16) |
(Bytes[1] << 24);
} else {
- insn = (Bytes[0] << 0) |
- (Bytes[1] << 8) |
- (Bytes[2] << 16) |
+ Insn = (Bytes[0] << 0) | (Bytes[1] << 8) | (Bytes[2] << 16) |
(Bytes[3] << 24);
}
}
@@ -753,24 +732,22 @@ static DecodeStatus readInstruction32(co
return MCDisassembler::Success;
}
-DecodeStatus
-MipsDisassembler::getInstruction(MCInst &instr,
- uint64_t &Size,
- const MemoryObject &Region,
- uint64_t Address,
- raw_ostream &vStream,
- raw_ostream &cStream) const {
+DecodeStatus MipsDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
+ const MemoryObject &Region,
+ uint64_t Address,
+ raw_ostream &VStream,
+ raw_ostream &CStream) const {
uint32_t Insn;
- DecodeStatus Result = readInstruction32(Region, Address, Size,
- Insn, isBigEndian, IsMicroMips);
+ DecodeStatus Result =
+ readInstruction32(Region, Address, Size, Insn, IsBigEndian, IsMicroMips);
if (Result == MCDisassembler::Fail)
return MCDisassembler::Fail;
if (IsMicroMips) {
DEBUG(dbgs() << "Trying MicroMips32 table (32-bit opcodes):\n");
// Calling the auto-generated decoder function.
- Result = decodeInstruction(DecoderTableMicroMips32, instr, Insn, Address,
+ Result = decodeInstruction(DecoderTableMicroMips32, Instr, Insn, Address,
this, STI);
if (Result != MCDisassembler::Fail) {
Size = 4;
@@ -782,7 +759,7 @@ MipsDisassembler::getInstruction(MCInst
if (hasCOP3()) {
DEBUG(dbgs() << "Trying COP3_ table (32-bit opcodes):\n");
Result =
- decodeInstruction(DecoderTableCOP3_32, instr, Insn, Address, this, STI);
+ decodeInstruction(DecoderTableCOP3_32, Instr, Insn, Address, this, STI);
if (Result != MCDisassembler::Fail) {
Size = 4;
return Result;
@@ -791,7 +768,7 @@ MipsDisassembler::getInstruction(MCInst
if (hasMips32r6() && isGP64()) {
DEBUG(dbgs() << "Trying Mips32r6_64r6 (GPR64) table (32-bit opcodes):\n");
- Result = decodeInstruction(DecoderTableMips32r6_64r6_GP6432, instr, Insn,
+ Result = decodeInstruction(DecoderTableMips32r6_64r6_GP6432, Instr, Insn,
Address, this, STI);
if (Result != MCDisassembler::Fail) {
Size = 4;
@@ -801,7 +778,7 @@ MipsDisassembler::getInstruction(MCInst
if (hasMips32r6()) {
DEBUG(dbgs() << "Trying Mips32r6_64r6 table (32-bit opcodes):\n");
- Result = decodeInstruction(DecoderTableMips32r6_64r632, instr, Insn,
+ Result = decodeInstruction(DecoderTableMips32r6_64r632, Instr, Insn,
Address, this, STI);
if (Result != MCDisassembler::Fail) {
Size = 4;
@@ -811,8 +788,8 @@ MipsDisassembler::getInstruction(MCInst
DEBUG(dbgs() << "Trying Mips table (32-bit opcodes):\n");
// Calling the auto-generated decoder function.
- Result = decodeInstruction(DecoderTableMips32, instr, Insn, Address,
- this, STI);
+ Result =
+ decodeInstruction(DecoderTableMips32, Instr, Insn, Address, this, STI);
if (Result != MCDisassembler::Fail) {
Size = 4;
return Result;
@@ -821,30 +798,28 @@ MipsDisassembler::getInstruction(MCInst
return MCDisassembler::Fail;
}
-DecodeStatus
-Mips64Disassembler::getInstruction(MCInst &instr,
- uint64_t &Size,
- const MemoryObject &Region,
- uint64_t Address,
- raw_ostream &vStream,
- raw_ostream &cStream) const {
+DecodeStatus Mips64Disassembler::getInstruction(MCInst &Instr, uint64_t &Size,
+ const MemoryObject &Region,
+ uint64_t Address,
+ raw_ostream &VStream,
+ raw_ostream &CStream) const {
uint32_t Insn;
- DecodeStatus Result = readInstruction32(Region, Address, Size,
- Insn, isBigEndian, false);
+ DecodeStatus Result =
+ readInstruction32(Region, Address, Size, Insn, IsBigEndian, false);
if (Result == MCDisassembler::Fail)
return MCDisassembler::Fail;
// Calling the auto-generated decoder function.
- Result = decodeInstruction(DecoderTableMips6432, instr, Insn, Address,
- this, STI);
+ Result =
+ decodeInstruction(DecoderTableMips6432, Instr, Insn, Address, this, STI);
if (Result != MCDisassembler::Fail) {
Size = 4;
return Result;
}
// If we fail to decode in Mips64 decoder space we can try in Mips32
- Result = decodeInstruction(DecoderTableMips32, instr, Insn, Address,
- this, STI);
+ Result =
+ decodeInstruction(DecoderTableMips32, Instr, Insn, Address, this, STI);
if (Result != MCDisassembler::Fail) {
Size = 4;
return Result;
Modified: llvm/trunk/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp?rev=221615&r1=221614&r2=221615&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp Mon Nov 10 12:11:10 2014
@@ -28,11 +28,10 @@ public:
: MCDisassembler(STI, Ctx) {}
virtual ~PPCDisassembler() {}
- // Override MCDisassembler.
- DecodeStatus getInstruction(MCInst &instr, uint64_t &size,
- const MemoryObject ®ion, uint64_t address,
- raw_ostream &vStream,
- raw_ostream &cStream) const override;
+ DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
+ const MemoryObject &Region, uint64_t Address,
+ raw_ostream &VStream,
+ raw_ostream &CStream) const override;
};
} // end anonymous namespace
@@ -323,10 +322,9 @@ static DecodeStatus decodeCRBitMOperand(
#include "PPCGenDisassemblerTables.inc"
DecodeStatus PPCDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
- const MemoryObject &Region,
- uint64_t Address,
- raw_ostream &os,
- raw_ostream &cs) const {
+ const MemoryObject &Region,
+ uint64_t Address, raw_ostream &OS,
+ raw_ostream &CS) const {
// Get the four bytes of the instruction.
uint8_t Bytes[4];
Size = 4;
@@ -336,10 +334,8 @@ DecodeStatus PPCDisassembler::getInstruc
}
// The instruction is big-endian encoded.
- uint32_t Inst = (Bytes[0] << 24) |
- (Bytes[1] << 16) |
- (Bytes[2] << 8) |
- (Bytes[3] << 0);
+ uint32_t Inst =
+ (Bytes[0] << 24) | (Bytes[1] << 16) | (Bytes[2] << 8) | (Bytes[3] << 0);
return decodeInstruction(DecoderTable32, MI, Inst, Address, this, STI);
}
Modified: llvm/trunk/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp?rev=221615&r1=221614&r2=221615&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp Mon Nov 10 12:11:10 2014
@@ -27,23 +27,17 @@ typedef MCDisassembler::DecodeStatus Dec
namespace {
-/// SparcDisassembler - a disassembler class for Sparc.
+/// A disassembler class for Sparc.
class SparcDisassembler : public MCDisassembler {
public:
- /// Constructor - Initializes the disassembler.
- ///
- SparcDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) :
- MCDisassembler(STI, Ctx)
- {}
+ SparcDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
+ : MCDisassembler(STI, Ctx) {}
virtual ~SparcDisassembler() {}
- /// getInstruction - See MCDisassembler.
- DecodeStatus getInstruction(MCInst &instr,
- uint64_t &size,
- const MemoryObject ®ion,
- uint64_t address,
- raw_ostream &vStream,
- raw_ostream &cStream) const override;
+ DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
+ const MemoryObject &Region, uint64_t Address,
+ raw_ostream &VStream,
+ raw_ostream &CStream) const override;
};
}
@@ -213,37 +207,30 @@ static DecodeStatus DecodeSWAP(MCInst &I
#include "SparcGenDisassemblerTables.inc"
-/// readInstruction - read four bytes from the MemoryObject
-/// and return 32 bit word.
-static DecodeStatus readInstruction32(const MemoryObject ®ion,
- uint64_t address,
- uint64_t &size,
- uint32_t &insn) {
+/// Read four bytes from the MemoryObject and return 32 bit word.
+static DecodeStatus readInstruction32(const MemoryObject &Region,
+ uint64_t Address, uint64_t &Size,
+ uint32_t &Insn) {
uint8_t Bytes[4];
// We want to read exactly 4 Bytes of data.
- if (region.readBytes(address, 4, Bytes) == -1) {
- size = 0;
+ if (Region.readBytes(Address, 4, Bytes) == -1) {
+ Size = 0;
return MCDisassembler::Fail;
}
// Encoded as a big-endian 32-bit word in the stream.
- insn = (Bytes[3] << 0) |
- (Bytes[2] << 8) |
- (Bytes[1] << 16) |
- (Bytes[0] << 24);
+ Insn =
+ (Bytes[3] << 0) | (Bytes[2] << 8) | (Bytes[1] << 16) | (Bytes[0] << 24);
return MCDisassembler::Success;
}
-
-DecodeStatus
-SparcDisassembler::getInstruction(MCInst &instr,
- uint64_t &Size,
- const MemoryObject &Region,
- uint64_t Address,
- raw_ostream &vStream,
- raw_ostream &cStream) const {
+DecodeStatus SparcDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
+ const MemoryObject &Region,
+ uint64_t Address,
+ raw_ostream &VStream,
+ raw_ostream &CStream) const {
uint32_t Insn;
DecodeStatus Result = readInstruction32(Region, Address, Size, Insn);
@@ -252,8 +239,8 @@ SparcDisassembler::getInstruction(MCInst
// Calling the auto-generated decoder function.
- Result = decodeInstruction(DecoderTableSparc32, instr, Insn, Address,
- this, STI);
+ Result =
+ decodeInstruction(DecoderTableSparc32, Instr, Insn, Address, this, STI);
if (Result != MCDisassembler::Fail) {
Size = 4;
Modified: llvm/trunk/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp?rev=221615&r1=221614&r2=221615&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp Mon Nov 10 12:11:10 2014
@@ -28,11 +28,10 @@ public:
: MCDisassembler(STI, Ctx) {}
virtual ~SystemZDisassembler() {}
- // Override MCDisassembler.
- DecodeStatus getInstruction(MCInst &instr, uint64_t &size,
- const MemoryObject ®ion, uint64_t address,
- raw_ostream &vStream,
- raw_ostream &cStream) const override;
+ DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
+ const MemoryObject &Region, uint64_t Address,
+ raw_ostream &VStream,
+ raw_ostream &CStream) const override;
};
} // end anonymous namespace
@@ -290,8 +289,8 @@ static DecodeStatus decodeBDLAddr64Disp1
DecodeStatus SystemZDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
const MemoryObject &Region,
uint64_t Address,
- raw_ostream &os,
- raw_ostream &cs) const {
+ raw_ostream &OS,
+ raw_ostream &CS) const {
// Get the first two bytes of the instruction.
uint8_t Bytes[6];
Size = 0;
Modified: llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp?rev=221615&r1=221614&r2=221615&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp Mon Nov 10 12:11:10 2014
@@ -97,16 +97,15 @@ X86GenericDisassembler::X86GenericDisass
}
}
-/// regionReader - a callback function that wraps the readByte method from
-/// MemoryObject.
+/// A callback function that wraps the readByte method from MemoryObject.
///
-/// @param arg - The generic callback parameter. In this case, this should
+/// @param Arg - The generic callback parameter. In this case, this should
/// be a pointer to a MemoryObject.
-/// @param byte - A pointer to the byte to be read.
-/// @param address - The address to be read.
-static int regionReader(const void* arg, uint8_t* byte, uint64_t address) {
- const MemoryObject* region = static_cast<const MemoryObject*>(arg);
- return region->readByte(address, byte);
+/// @param Byte - A pointer to the byte to be read.
+/// @param Address - The address to be read.
+static int regionReader(const void *Arg, uint8_t *Byte, uint64_t Address) {
+ const MemoryObject *Region = static_cast<const MemoryObject *>(Arg);
+ return Region->readByte(Address, Byte);
}
/// logger - a callback function that wraps the operator<< method from
@@ -127,38 +126,27 @@ static void logger(void* arg, const char
// Public interface for the disassembler
//
-MCDisassembler::DecodeStatus
-X86GenericDisassembler::getInstruction(MCInst &instr,
- uint64_t &size,
- const MemoryObject ®ion,
- uint64_t address,
- raw_ostream &vStream,
- raw_ostream &cStream) const {
- CommentStream = &cStream;
-
- InternalInstruction internalInstr;
-
- dlog_t loggerFn = logger;
- if (&vStream == &nulls())
- loggerFn = nullptr; // Disable logging completely if it's going to nulls().
-
- int ret = decodeInstruction(&internalInstr,
- regionReader,
- (const void*)®ion,
- loggerFn,
- (void*)&vStream,
- (const void*)MII.get(),
- address,
- fMode);
+MCDisassembler::DecodeStatus X86GenericDisassembler::getInstruction(
+ MCInst &Instr, uint64_t &Size, const MemoryObject &Region, uint64_t Address,
+ raw_ostream &VStream, raw_ostream &CStream) const {
+ CommentStream = &CStream;
+
+ InternalInstruction InternalInstr;
+
+ dlog_t LoggerFn = logger;
+ if (&VStream == &nulls())
+ LoggerFn = nullptr; // Disable logging completely if it's going to nulls().
+
+ int Ret = decodeInstruction(&InternalInstr, regionReader,
+ (const void *)&Region, LoggerFn, (void *)&VStream,
+ (const void *)MII.get(), Address, fMode);
- if (ret) {
- size = internalInstr.readerCursor - address;
+ if (Ret) {
+ Size = InternalInstr.readerCursor - Address;
return Fail;
- }
- else {
- size = internalInstr.length;
- return (!translateInstruction(instr, internalInstr, this)) ?
- Success : Fail;
+ } else {
+ Size = InternalInstr.length;
+ return (!translateInstruction(Instr, InternalInstr, this)) ? Success : Fail;
}
}
Modified: llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h?rev=221615&r1=221614&r2=221615&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h Mon Nov 10 12:11:10 2014
@@ -87,19 +87,15 @@ class raw_ostream;
namespace X86Disassembler {
-/// X86GenericDisassembler - Generic disassembler for all X86 platforms.
-/// All each platform class should have to do is subclass the constructor, and
-/// provide a different disassemblerMode value.
+/// Generic disassembler for all X86 platforms. All each platform class should
+/// have to do is subclass the constructor, and provide a different
+/// disassemblerMode value.
class X86GenericDisassembler : public MCDisassembler {
std::unique_ptr<const MCInstrInfo> MII;
public:
- /// Constructor - Initializes the disassembler.
- ///
X86GenericDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx,
std::unique_ptr<const MCInstrInfo> MII);
public:
-
- /// getInstruction - See MCDisassembler.
DecodeStatus getInstruction(MCInst &instr, uint64_t &size,
const MemoryObject ®ion, uint64_t address,
raw_ostream &vStream,
Modified: llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp?rev=221615&r1=221614&r2=221615&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp Mon Nov 10 12:11:10 2014
@@ -36,44 +36,39 @@ public:
XCoreDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) :
MCDisassembler(STI, Ctx) {}
- /// \brief See MCDisassembler.
- DecodeStatus getInstruction(MCInst &instr, uint64_t &size,
- const MemoryObject ®ion, uint64_t address,
- raw_ostream &vStream,
- raw_ostream &cStream) const override;
+ DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
+ const MemoryObject &Region, uint64_t Address,
+ raw_ostream &VStream,
+ raw_ostream &CStream) const override;
};
}
-static bool readInstruction16(const MemoryObject ®ion,
- uint64_t address,
- uint64_t &size,
- uint16_t &insn) {
+static bool readInstruction16(const MemoryObject &Region, uint64_t Address,
+ uint64_t &Size, uint16_t &Insn) {
uint8_t Bytes[4];
// We want to read exactly 2 Bytes of data.
- if (region.readBytes(address, 2, Bytes) == -1) {
- size = 0;
+ if (Region.readBytes(Address, 2, Bytes) == -1) {
+ Size = 0;
return false;
}
// Encoded as a little-endian 16-bit word in the stream.
- insn = (Bytes[0] << 0) | (Bytes[1] << 8);
+ Insn = (Bytes[0] << 0) | (Bytes[1] << 8);
return true;
}
-static bool readInstruction32(const MemoryObject ®ion,
- uint64_t address,
- uint64_t &size,
- uint32_t &insn) {
+static bool readInstruction32(const MemoryObject &Region, uint64_t Address,
+ uint64_t &Size, uint32_t &Insn) {
uint8_t Bytes[4];
// We want to read exactly 4 Bytes of data.
- if (region.readBytes(address, 4, Bytes) == -1) {
- size = 0;
+ if (Region.readBytes(Address, 4, Bytes) == -1) {
+ Size = 0;
return false;
}
// Encoded as a little-endian 32-bit word in the stream.
- insn = (Bytes[0] << 0) | (Bytes[1] << 8) | (Bytes[2] << 16) |
- (Bytes[3] << 24);
+ Insn =
+ (Bytes[0] << 0) | (Bytes[1] << 8) | (Bytes[2] << 16) | (Bytes[3] << 24);
return true;
}
@@ -745,13 +740,9 @@ DecodeL4RSrcDstSrcDstInstruction(MCInst
return S;
}
-MCDisassembler::DecodeStatus
-XCoreDisassembler::getInstruction(MCInst &instr,
- uint64_t &Size,
- const MemoryObject &Region,
- uint64_t Address,
- raw_ostream &vStream,
- raw_ostream &cStream) const {
+MCDisassembler::DecodeStatus XCoreDisassembler::getInstruction(
+ MCInst &instr, uint64_t &Size, const MemoryObject &Region, uint64_t Address,
+ raw_ostream &vStream, raw_ostream &cStream) const {
uint16_t insn16;
if (!readInstruction16(Region, Address, Size, insn16)) {
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