[PATCH] [mips] Tolerate the use of the %z inline asm operand modifier with non-immediates.

[Daniel Sanders]

================
Comment at: test/CodeGen/Mips/inlineasm-operand-code.ll:89
@@ +88,3 @@
+;CHECK_LITTLE_32:    #APP
+;CHECK_LITTLE_32:    mtc0 ${{[0-9]+}}, ${{[0-9]+}}
+;CHECK_LITTLE_32:    #NO_APP
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tomatabacu wrote:
> dsanders wrote:
> > tomatabacu wrote:
> > > dsanders wrote:
> > > > Shouldn't this be restricted to $0?
> > > No, because in this case we no longer have the "J" constraint (which makes zero-values into immediates), so the value is always put into a register.
> > The reason I think it should be $0 is that materializing 0 can be done without any code. Whereas the above examples passes in the immediate 0 and printed it as $0, in this code I believe this one should be passing in the register $0.
> > 
> > As we discussed off-list, the code generator is currently materializing 0 with 'addiu $1, $zero, 0'. We need to fix this but it's not related to your patch.
> > 
> > For now, could you add an explicit check for the 'addiu ${{[0-9]+}}, $zero, 0' along with a fixme comment explaining the issue. This way, we will be prompted to correct the test when we fix the materialization problem.
> There's no need for an additional check for addiu, as the test would already fail if the materialization of 0 was fixed.
> This is because, for the first argument of the mtc0 instruction, we're checking for any register that is not $0, so if the currently non-$0 register changes into $0, the test will fail.
> 
> I'll still add a FIXME with an explanation, though.
Good point. LGTM.

http://reviews.llvm.org/D6023