[llvm] r220987 - [AArch64] Check Dest Register Liveness in CondOpt pass.

[Sergey Dmitrouk]

>    Is <= and >= somehow better than < and > ?

Description should have x12 in both compares (I guess x17 is a typo), in
which case if two comparison instructions become equal CSE pass can
remove the second one.

-- 
Sergey

On Fri, Oct 31, 2014 at 05:43:38PM -0700, Sean Silva wrote:
>    On Fri, Oct 31, 2014 at 12:02 PM, Chad Rosier <mcrosier at codeaurora.org>
>    wrote:
> 
>      Author: mcrosier
>      Date: Fri Oct 31 14:02:38 2014
>      New Revision: 220987
> 
>      URL: http://llvm.org/viewvc/llvm-project?rev=220987&view=rev
>      Log:
>      [AArch64] Check Dest Register Liveness in CondOpt pass.
> 
>      Our internal test reveals such case should not be transformed:
> 
>      A  cmp x17, #3
>      A  b.lt .LBB10_15
>      A  ...
>      A  subs x12, x12, #1
>      A  b.gt .LBB10_1
> 
>      where x12 is a liveout, becomes:
> 
>      A  cmp x17, #2
>      A  b.le .LBB10_15
>      A  ...
>      A  subs x12, x12, #2
>      A  b.ge .LBB10_1
> 
>    ?
>    Is <= and >= somehow better than < and > ?
>    -- Sean Silva
>    A 
> 
>      Unable to provide test case as it's difficult to reproduce on community
>      branch.
> 
>      http://reviews.llvm.org/D6048
>      Patch by Zhaoshi Zheng <zhaoshiz at codeaurora.org>!
> 
>      Modified:
>      A  A  llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
> 
>      Modified: llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
>      URL:
>      http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp?rev=220987&r1=220986&r2=220987&view=diff
>      ==============================================================================
>      --- llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
>      (original)
>      +++ llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp Fri Oct
>      31 14:02:38 2014
>      @@ -62,6 +62,7 @@
>      A #include "llvm/ADT/DepthFirstIterator.h"
>      A #include "llvm/ADT/SmallVector.h"
>      A #include "llvm/ADT/Statistic.h"
>      +#include "llvm/CodeGen/LiveIntervalAnalysis.h"
>      A #include "llvm/CodeGen/MachineDominators.h"
>      A #include "llvm/CodeGen/MachineFunction.h"
>      A #include "llvm/CodeGen/MachineFunctionPass.h"
>      @@ -115,6 +116,7 @@ void initializeAArch64ConditionOptimizer
>      A INITIALIZE_PASS_BEGIN(AArch64ConditionOptimizer, "aarch64-condopt",
>      A  A  A  A  A  A  A  A  A  A  A  A "AArch64 CondOpt Pass", false, false)
>      A INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
>      +INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
>      A INITIALIZE_PASS_END(AArch64ConditionOptimizer, "aarch64-condopt",
>      A  A  A  A  A  A  A  A  A  A  A "AArch64 CondOpt Pass", false, false)
> 
>      @@ -125,6 +127,8 @@ FunctionPass *llvm::createAArch64Conditi
>      A void AArch64ConditionOptimizer::getAnalysisUsage(AnalysisUsage &AU)
>      const {
>      A  A AU.addRequired<MachineDominatorTree>();
>      A  A AU.addPreserved<MachineDominatorTree>();
>      +A  AU.addRequired<LiveIntervals>();
>      +A  AU.addPreserved<LiveIntervals>();
>      A  A MachineFunctionPass::getAnalysisUsage(AU);
>      A }
> 
>      @@ -134,13 +138,11 @@ void AArch64ConditionOptimizer::getAnaly
>      A MachineInstr *AArch64ConditionOptimizer::findSuitableCompare(
>      A  A  A MachineBasicBlock *MBB) {
>      A  A MachineBasicBlock::iterator I = MBB->getFirstTerminator();
>      -A  if (I == MBB->end()) {
>      +A  if (I == MBB->end())
>      A  A  A return nullptr;
>      -A  }
> 
>      -A  if (I->getOpcode() != AArch64::Bcc) {
>      -A  A  A  return nullptr;
>      -A  }
>      +A  if (I->getOpcode() != AArch64::Bcc)
>      +A  A  return nullptr;
> 
>      A  A // Now find the instruction controlling the terminator.
>      A  A for (MachineBasicBlock::iterator B = MBB->begin(); I != B;) {
>      @@ -153,7 +155,11 @@ MachineInstr *AArch64ConditionOptimizer:
>      A  A  A // cmn is an alias for adds with a dead destination register.
>      A  A  A case AArch64::ADDSWri:
>      A  A  A case AArch64::ADDSXri:
>      -A  A  A  return I;
>      +A  A  A  if (I->getOperand(0).isDead())
>      +A  A  A  A  return I;
>      +
>      +A  A  A  DEBUG(dbgs() << "Destination of cmp is not dead, " << *I <<
>      '\n');
>      +A  A  A  return nullptr;
> 
>      A  A  A // Prevent false positive case like:
>      A  A  A // cmpA  A  A  w19, #0
> 
>      _______________________________________________
>      llvm-commits mailing list
>      llvm-commits at cs.uiuc.edu
>      http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits