[llvm] r220806 - [AVX512] Extended avx512_sqrt_packed (sqrt instructions) to VL subset.
Robert Khasanov
rob.khasanov at gmail.com
Tue Oct 28 11:15:20 PDT 2014
Author: rkhasanov
Date: Tue Oct 28 13:15:20 2014
New Revision: 220806
URL: http://llvm.org/viewvc/llvm-project?rev=220806&view=rev
Log:
[AVX512] Extended avx512_sqrt_packed (sqrt instructions) to VL subset.
Refactored through AVX512_maskable
Modified:
llvm/trunk/lib/Target/X86/X86InstrAVX512.td
llvm/trunk/test/MC/X86/avx512-encodings.s
llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s
llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp
Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=220806&r1=220805&r2=220806&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Tue Oct 28 13:15:20 2014
@@ -4273,32 +4273,24 @@ def : Pat <(v8f64 (int_x86_avx512_rcp28_
(bc_v8f64 (v16i32 immAllZerosV)), (i8 -1), FROUND_NO_EXC)),
(VRCP28PDZrb VR512:$src)>;
-multiclass avx512_sqrt_packed<bits<8> opc, string OpcodeStr, SDNode OpNode,
- OpndItins itins_s, OpndItins itins_d> {
- def PSZrr :AVX512PSI<opc, MRMSrcReg, (outs VR512:$dst), (ins VR512:$src),
- !strconcat(OpcodeStr, "ps\t{$src, $dst|$dst, $src}"),
- [(set VR512:$dst, (v16f32 (OpNode VR512:$src)))], itins_s.rr>,
- EVEX, EVEX_V512;
-
- let mayLoad = 1 in
- def PSZrm : AVX512PSI<opc, MRMSrcMem, (outs VR512:$dst), (ins f512mem:$src),
- !strconcat(OpcodeStr, "ps\t{$src, $dst|$dst, $src}"),
- [(set VR512:$dst,
- (OpNode (v16f32 (bitconvert (memopv16f32 addr:$src)))))],
- itins_s.rm>, EVEX, EVEX_V512, EVEX_CD8<32, CD8VF>;
-
- def PDZrr : AVX512PDI<opc, MRMSrcReg, (outs VR512:$dst), (ins VR512:$src),
- !strconcat(OpcodeStr, "pd\t{$src, $dst|$dst, $src}"),
- [(set VR512:$dst, (v8f64 (OpNode VR512:$src)))], itins_d.rr>,
- EVEX, EVEX_V512;
-
- let mayLoad = 1 in
- def PDZrm : AVX512PDI<opc, MRMSrcMem, (outs VR512:$dst), (ins f512mem:$src),
- !strconcat(OpcodeStr, "pd\t{$src, $dst|$dst, $src}"),
- [(set VR512:$dst, (OpNode
- (v8f64 (bitconvert (memopv16f32 addr:$src)))))],
- itins_d.rm>, EVEX, EVEX_V512, EVEX_CD8<64, CD8VF>;
-
+multiclass avx512_sqrt_packed<bits<8> opc, string OpcodeStr,
+ SDNode OpNode, X86VectorVTInfo _>{
+ defm rr: AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
+ (ins _.RC:$src), OpcodeStr, "$src", "$src",
+ (_.FloatVT (OpNode _.RC:$src))>, EVEX;
+ let mayLoad = 1 in {
+ defm rm: AVX512_maskable<opc, MRMSrcMem, _, (outs _.RC:$dst),
+ (ins _.MemOp:$src), OpcodeStr, "$src", "$src",
+ (OpNode (_.FloatVT
+ (bitconvert (_.LdFrag addr:$src))))>, EVEX;
+
+ defm rmb: AVX512_maskable<opc, MRMSrcMem, _, (outs _.RC:$dst),
+ (ins _.ScalarMemOp:$src), OpcodeStr,
+ "${src}"##_.BroadcastStr, "${src}"##_.BroadcastStr,
+ (OpNode (_.FloatVT
+ (X86VBroadcast (_.ScalarLdFrag addr:$src))))>,
+ EVEX, EVEX_B;
+ }
}
multiclass avx512_sqrt_scalar<bits<8> opc, string OpcodeStr,
@@ -4362,12 +4354,36 @@ multiclass avx512_sqrt_scalar<bits<8> op
}
}
+multiclass avx512_sqrt_packed_all<bits<8> opc, string OpcodeStr,
+ SDNode OpNode> {
+ defm PSZ : avx512_sqrt_packed<opc, !strconcat(OpcodeStr, "ps"), OpNode,
+ v16f32_info>,
+ EVEX_V512, PS, EVEX_CD8<32, CD8VF>;
+ defm PDZ : avx512_sqrt_packed<opc, !strconcat(OpcodeStr, "pd"), OpNode,
+ v8f64_info>,
+ EVEX_V512, VEX_W, PD, EVEX_CD8<64, CD8VF>;
+ // Define only if AVX512VL feature is present.
+ let Predicates = [HasVLX] in {
+ defm PSZ128 : avx512_sqrt_packed<opc, !strconcat(OpcodeStr, "ps"),
+ OpNode, v4f32x_info>,
+ EVEX_V128, PS, EVEX_CD8<32, CD8VF>;
+ defm PSZ256 : avx512_sqrt_packed<opc, !strconcat(OpcodeStr, "ps"),
+ OpNode, v8f32x_info>,
+ EVEX_V256, PS, EVEX_CD8<32, CD8VF>;
+ defm PDZ128 : avx512_sqrt_packed<opc, !strconcat(OpcodeStr, "pd"),
+ OpNode, v2f64x_info>,
+ EVEX_V128, VEX_W, PD, EVEX_CD8<64, CD8VF>;
+ defm PDZ256 : avx512_sqrt_packed<opc, !strconcat(OpcodeStr, "pd"),
+ OpNode, v4f64x_info>,
+ EVEX_V256, VEX_W, PD, EVEX_CD8<64, CD8VF>;
+ }
+}
+
+defm VSQRT : avx512_sqrt_packed_all<0x51, "vsqrt", fsqrt>;
defm VSQRT : avx512_sqrt_scalar<0x51, "sqrt",
int_x86_avx512_sqrt_ss, int_x86_avx512_sqrt_sd,
- SSE_SQRTSS, SSE_SQRTSD>,
- avx512_sqrt_packed<0x51, "vsqrt", fsqrt,
- SSE_SQRTPS, SSE_SQRTPD>;
+ SSE_SQRTSS, SSE_SQRTSD>;
let Predicates = [HasAVX512] in {
def : Pat<(v16f32 (int_x86_avx512_sqrt_ps_512 (v16f32 VR512:$src1),
Modified: llvm/trunk/test/MC/X86/avx512-encodings.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/avx512-encodings.s?rev=220806&r1=220805&r2=220806&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/avx512-encodings.s (original)
+++ llvm/trunk/test/MC/X86/avx512-encodings.s Tue Oct 28 13:15:20 2014
@@ -3417,6 +3417,118 @@
// CHECK: encoding: [0x62,0xe2,0x7d,0x58,0x4e,0x82,0xfc,0xfd,0xff,0xff]
vrsqrt14ps -516(%rdx){1to16}, %zmm16
+// CHECK: vsqrtpd %zmm19, %zmm19
+// CHECK: encoding: [0x62,0xa1,0xfd,0x48,0x51,0xdb]
+ vsqrtpd %zmm19, %zmm19
+
+// CHECK: vsqrtpd %zmm19, %zmm19 {%k5}
+// CHECK: encoding: [0x62,0xa1,0xfd,0x4d,0x51,0xdb]
+ vsqrtpd %zmm19, %zmm19 {%k5}
+
+// CHECK: vsqrtpd %zmm19, %zmm19 {%k5} {z}
+// CHECK: encoding: [0x62,0xa1,0xfd,0xcd,0x51,0xdb]
+ vsqrtpd %zmm19, %zmm19 {%k5} {z}
+
+// CHECK: vsqrtpd (%rcx), %zmm19
+// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x51,0x19]
+ vsqrtpd (%rcx), %zmm19
+
+// CHECK: vsqrtpd 291(%rax,%r14,8), %zmm19
+// CHECK: encoding: [0x62,0xa1,0xfd,0x48,0x51,0x9c,0xf0,0x23,0x01,0x00,0x00]
+ vsqrtpd 291(%rax,%r14,8), %zmm19
+
+// CHECK: vsqrtpd (%rcx){1to8}, %zmm19
+// CHECK: encoding: [0x62,0xe1,0xfd,0x58,0x51,0x19]
+ vsqrtpd (%rcx){1to8}, %zmm19
+
+// CHECK: vsqrtpd 8128(%rdx), %zmm19
+// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x51,0x5a,0x7f]
+ vsqrtpd 8128(%rdx), %zmm19
+
+// CHECK: vsqrtpd 8192(%rdx), %zmm19
+// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x51,0x9a,0x00,0x20,0x00,0x00]
+ vsqrtpd 8192(%rdx), %zmm19
+
+// CHECK: vsqrtpd -8192(%rdx), %zmm19
+// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x51,0x5a,0x80]
+ vsqrtpd -8192(%rdx), %zmm19
+
+// CHECK: vsqrtpd -8256(%rdx), %zmm19
+// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x51,0x9a,0xc0,0xdf,0xff,0xff]
+ vsqrtpd -8256(%rdx), %zmm19
+
+// CHECK: vsqrtpd 1016(%rdx){1to8}, %zmm19
+// CHECK: encoding: [0x62,0xe1,0xfd,0x58,0x51,0x5a,0x7f]
+ vsqrtpd 1016(%rdx){1to8}, %zmm19
+
+// CHECK: vsqrtpd 1024(%rdx){1to8}, %zmm19
+// CHECK: encoding: [0x62,0xe1,0xfd,0x58,0x51,0x9a,0x00,0x04,0x00,0x00]
+ vsqrtpd 1024(%rdx){1to8}, %zmm19
+
+// CHECK: vsqrtpd -1024(%rdx){1to8}, %zmm19
+// CHECK: encoding: [0x62,0xe1,0xfd,0x58,0x51,0x5a,0x80]
+ vsqrtpd -1024(%rdx){1to8}, %zmm19
+
+// CHECK: vsqrtpd -1032(%rdx){1to8}, %zmm19
+// CHECK: encoding: [0x62,0xe1,0xfd,0x58,0x51,0x9a,0xf8,0xfb,0xff,0xff]
+ vsqrtpd -1032(%rdx){1to8}, %zmm19
+
+// CHECK: vsqrtps %zmm29, %zmm28
+// CHECK: encoding: [0x62,0x01,0x7c,0x48,0x51,0xe5]
+ vsqrtps %zmm29, %zmm28
+
+// CHECK: vsqrtps %zmm29, %zmm28 {%k3}
+// CHECK: encoding: [0x62,0x01,0x7c,0x4b,0x51,0xe5]
+ vsqrtps %zmm29, %zmm28 {%k3}
+
+// CHECK: vsqrtps %zmm29, %zmm28 {%k3} {z}
+// CHECK: encoding: [0x62,0x01,0x7c,0xcb,0x51,0xe5]
+ vsqrtps %zmm29, %zmm28 {%k3} {z}
+
+// CHECK: vsqrtps (%rcx), %zmm28
+// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x51,0x21]
+ vsqrtps (%rcx), %zmm28
+
+// CHECK: vsqrtps 291(%rax,%r14,8), %zmm28
+// CHECK: encoding: [0x62,0x21,0x7c,0x48,0x51,0xa4,0xf0,0x23,0x01,0x00,0x00]
+ vsqrtps 291(%rax,%r14,8), %zmm28
+
+// CHECK: vsqrtps (%rcx){1to16}, %zmm28
+// CHECK: encoding: [0x62,0x61,0x7c,0x58,0x51,0x21]
+ vsqrtps (%rcx){1to16}, %zmm28
+
+// CHECK: vsqrtps 8128(%rdx), %zmm28
+// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x51,0x62,0x7f]
+ vsqrtps 8128(%rdx), %zmm28
+
+// CHECK: vsqrtps 8192(%rdx), %zmm28
+// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x51,0xa2,0x00,0x20,0x00,0x00]
+ vsqrtps 8192(%rdx), %zmm28
+
+// CHECK: vsqrtps -8192(%rdx), %zmm28
+// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x51,0x62,0x80]
+ vsqrtps -8192(%rdx), %zmm28
+
+// CHECK: vsqrtps -8256(%rdx), %zmm28
+// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x51,0xa2,0xc0,0xdf,0xff,0xff]
+ vsqrtps -8256(%rdx), %zmm28
+
+// CHECK: vsqrtps 508(%rdx){1to16}, %zmm28
+// CHECK: encoding: [0x62,0x61,0x7c,0x58,0x51,0x62,0x7f]
+ vsqrtps 508(%rdx){1to16}, %zmm28
+
+// CHECK: vsqrtps 512(%rdx){1to16}, %zmm28
+// CHECK: encoding: [0x62,0x61,0x7c,0x58,0x51,0xa2,0x00,0x02,0x00,0x00]
+ vsqrtps 512(%rdx){1to16}, %zmm28
+
+// CHECK: vsqrtps -512(%rdx){1to16}, %zmm28
+// CHECK: encoding: [0x62,0x61,0x7c,0x58,0x51,0x62,0x80]
+ vsqrtps -512(%rdx){1to16}, %zmm28
+
+// CHECK: vsqrtps -516(%rdx){1to16}, %zmm28
+// CHECK: encoding: [0x62,0x61,0x7c,0x58,0x51,0xa2,0xfc,0xfd,0xff,0xff]
+ vsqrtps -516(%rdx){1to16}, %zmm28
+
// CHECK: vsubpd %zmm9, %zmm12, %zmm9
// CHECK: encoding: [0x62,0x51,0x9d,0x48,0x5c,0xc9]
vsubpd %zmm9, %zmm12, %zmm9
Modified: llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s?rev=220806&r1=220805&r2=220806&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s (original)
+++ llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s Tue Oct 28 13:15:20 2014
@@ -4432,6 +4432,230 @@
// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x4e,0x9a,0xfc,0xfd,0xff,0xff]
vrsqrt14ps -516(%rdx){1to8}, %ymm27
+// CHECK: vsqrtpd %xmm26, %xmm29
+// CHECK: encoding: [0x62,0x01,0xfd,0x08,0x51,0xea]
+ vsqrtpd %xmm26, %xmm29
+
+// CHECK: vsqrtpd %xmm26, %xmm29 {%k3}
+// CHECK: encoding: [0x62,0x01,0xfd,0x0b,0x51,0xea]
+ vsqrtpd %xmm26, %xmm29 {%k3}
+
+// CHECK: vsqrtpd %xmm26, %xmm29 {%k3} {z}
+// CHECK: encoding: [0x62,0x01,0xfd,0x8b,0x51,0xea]
+ vsqrtpd %xmm26, %xmm29 {%k3} {z}
+
+// CHECK: vsqrtpd (%rcx), %xmm29
+// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x51,0x29]
+ vsqrtpd (%rcx), %xmm29
+
+// CHECK: vsqrtpd 291(%rax,%r14,8), %xmm29
+// CHECK: encoding: [0x62,0x21,0xfd,0x08,0x51,0xac,0xf0,0x23,0x01,0x00,0x00]
+ vsqrtpd 291(%rax,%r14,8), %xmm29
+
+// CHECK: vsqrtpd (%rcx){1to2}, %xmm29
+// CHECK: encoding: [0x62,0x61,0xfd,0x18,0x51,0x29]
+ vsqrtpd (%rcx){1to2}, %xmm29
+
+// CHECK: vsqrtpd 2032(%rdx), %xmm29
+// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x51,0x6a,0x7f]
+ vsqrtpd 2032(%rdx), %xmm29
+
+// CHECK: vsqrtpd 2048(%rdx), %xmm29
+// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x51,0xaa,0x00,0x08,0x00,0x00]
+ vsqrtpd 2048(%rdx), %xmm29
+
+// CHECK: vsqrtpd -2048(%rdx), %xmm29
+// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x51,0x6a,0x80]
+ vsqrtpd -2048(%rdx), %xmm29
+
+// CHECK: vsqrtpd -2064(%rdx), %xmm29
+// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x51,0xaa,0xf0,0xf7,0xff,0xff]
+ vsqrtpd -2064(%rdx), %xmm29
+
+// CHECK: vsqrtpd 1016(%rdx){1to2}, %xmm29
+// CHECK: encoding: [0x62,0x61,0xfd,0x18,0x51,0x6a,0x7f]
+ vsqrtpd 1016(%rdx){1to2}, %xmm29
+
+// CHECK: vsqrtpd 1024(%rdx){1to2}, %xmm29
+// CHECK: encoding: [0x62,0x61,0xfd,0x18,0x51,0xaa,0x00,0x04,0x00,0x00]
+ vsqrtpd 1024(%rdx){1to2}, %xmm29
+
+// CHECK: vsqrtpd -1024(%rdx){1to2}, %xmm29
+// CHECK: encoding: [0x62,0x61,0xfd,0x18,0x51,0x6a,0x80]
+ vsqrtpd -1024(%rdx){1to2}, %xmm29
+
+// CHECK: vsqrtpd -1032(%rdx){1to2}, %xmm29
+// CHECK: encoding: [0x62,0x61,0xfd,0x18,0x51,0xaa,0xf8,0xfb,0xff,0xff]
+ vsqrtpd -1032(%rdx){1to2}, %xmm29
+
+// CHECK: vsqrtpd %ymm20, %ymm18
+// CHECK: encoding: [0x62,0xa1,0xfd,0x28,0x51,0xd4]
+ vsqrtpd %ymm20, %ymm18
+
+// CHECK: vsqrtpd %ymm20, %ymm18 {%k3}
+// CHECK: encoding: [0x62,0xa1,0xfd,0x2b,0x51,0xd4]
+ vsqrtpd %ymm20, %ymm18 {%k3}
+
+// CHECK: vsqrtpd %ymm20, %ymm18 {%k3} {z}
+// CHECK: encoding: [0x62,0xa1,0xfd,0xab,0x51,0xd4]
+ vsqrtpd %ymm20, %ymm18 {%k3} {z}
+
+// CHECK: vsqrtpd (%rcx), %ymm18
+// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x51,0x11]
+ vsqrtpd (%rcx), %ymm18
+
+// CHECK: vsqrtpd 291(%rax,%r14,8), %ymm18
+// CHECK: encoding: [0x62,0xa1,0xfd,0x28,0x51,0x94,0xf0,0x23,0x01,0x00,0x00]
+ vsqrtpd 291(%rax,%r14,8), %ymm18
+
+// CHECK: vsqrtpd (%rcx){1to4}, %ymm18
+// CHECK: encoding: [0x62,0xe1,0xfd,0x38,0x51,0x11]
+ vsqrtpd (%rcx){1to4}, %ymm18
+
+// CHECK: vsqrtpd 4064(%rdx), %ymm18
+// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x51,0x52,0x7f]
+ vsqrtpd 4064(%rdx), %ymm18
+
+// CHECK: vsqrtpd 4096(%rdx), %ymm18
+// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x51,0x92,0x00,0x10,0x00,0x00]
+ vsqrtpd 4096(%rdx), %ymm18
+
+// CHECK: vsqrtpd -4096(%rdx), %ymm18
+// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x51,0x52,0x80]
+ vsqrtpd -4096(%rdx), %ymm18
+
+// CHECK: vsqrtpd -4128(%rdx), %ymm18
+// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x51,0x92,0xe0,0xef,0xff,0xff]
+ vsqrtpd -4128(%rdx), %ymm18
+
+// CHECK: vsqrtpd 1016(%rdx){1to4}, %ymm18
+// CHECK: encoding: [0x62,0xe1,0xfd,0x38,0x51,0x52,0x7f]
+ vsqrtpd 1016(%rdx){1to4}, %ymm18
+
+// CHECK: vsqrtpd 1024(%rdx){1to4}, %ymm18
+// CHECK: encoding: [0x62,0xe1,0xfd,0x38,0x51,0x92,0x00,0x04,0x00,0x00]
+ vsqrtpd 1024(%rdx){1to4}, %ymm18
+
+// CHECK: vsqrtpd -1024(%rdx){1to4}, %ymm18
+// CHECK: encoding: [0x62,0xe1,0xfd,0x38,0x51,0x52,0x80]
+ vsqrtpd -1024(%rdx){1to4}, %ymm18
+
+// CHECK: vsqrtpd -1032(%rdx){1to4}, %ymm18
+// CHECK: encoding: [0x62,0xe1,0xfd,0x38,0x51,0x92,0xf8,0xfb,0xff,0xff]
+ vsqrtpd -1032(%rdx){1to4}, %ymm18
+
+// CHECK: vsqrtps %xmm28, %xmm19
+// CHECK: encoding: [0x62,0x81,0x7c,0x08,0x51,0xdc]
+ vsqrtps %xmm28, %xmm19
+
+// CHECK: vsqrtps %xmm28, %xmm19 {%k7}
+// CHECK: encoding: [0x62,0x81,0x7c,0x0f,0x51,0xdc]
+ vsqrtps %xmm28, %xmm19 {%k7}
+
+// CHECK: vsqrtps %xmm28, %xmm19 {%k7} {z}
+// CHECK: encoding: [0x62,0x81,0x7c,0x8f,0x51,0xdc]
+ vsqrtps %xmm28, %xmm19 {%k7} {z}
+
+// CHECK: vsqrtps (%rcx), %xmm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x51,0x19]
+ vsqrtps (%rcx), %xmm19
+
+// CHECK: vsqrtps 291(%rax,%r14,8), %xmm19
+// CHECK: encoding: [0x62,0xa1,0x7c,0x08,0x51,0x9c,0xf0,0x23,0x01,0x00,0x00]
+ vsqrtps 291(%rax,%r14,8), %xmm19
+
+// CHECK: vsqrtps (%rcx){1to4}, %xmm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x18,0x51,0x19]
+ vsqrtps (%rcx){1to4}, %xmm19
+
+// CHECK: vsqrtps 2032(%rdx), %xmm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x51,0x5a,0x7f]
+ vsqrtps 2032(%rdx), %xmm19
+
+// CHECK: vsqrtps 2048(%rdx), %xmm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x51,0x9a,0x00,0x08,0x00,0x00]
+ vsqrtps 2048(%rdx), %xmm19
+
+// CHECK: vsqrtps -2048(%rdx), %xmm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x51,0x5a,0x80]
+ vsqrtps -2048(%rdx), %xmm19
+
+// CHECK: vsqrtps -2064(%rdx), %xmm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x51,0x9a,0xf0,0xf7,0xff,0xff]
+ vsqrtps -2064(%rdx), %xmm19
+
+// CHECK: vsqrtps 508(%rdx){1to4}, %xmm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x18,0x51,0x5a,0x7f]
+ vsqrtps 508(%rdx){1to4}, %xmm19
+
+// CHECK: vsqrtps 512(%rdx){1to4}, %xmm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x18,0x51,0x9a,0x00,0x02,0x00,0x00]
+ vsqrtps 512(%rdx){1to4}, %xmm19
+
+// CHECK: vsqrtps -512(%rdx){1to4}, %xmm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x18,0x51,0x5a,0x80]
+ vsqrtps -512(%rdx){1to4}, %xmm19
+
+// CHECK: vsqrtps -516(%rdx){1to4}, %xmm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x18,0x51,0x9a,0xfc,0xfd,0xff,0xff]
+ vsqrtps -516(%rdx){1to4}, %xmm19
+
+// CHECK: vsqrtps %ymm25, %ymm19
+// CHECK: encoding: [0x62,0x81,0x7c,0x28,0x51,0xd9]
+ vsqrtps %ymm25, %ymm19
+
+// CHECK: vsqrtps %ymm25, %ymm19 {%k2}
+// CHECK: encoding: [0x62,0x81,0x7c,0x2a,0x51,0xd9]
+ vsqrtps %ymm25, %ymm19 {%k2}
+
+// CHECK: vsqrtps %ymm25, %ymm19 {%k2} {z}
+// CHECK: encoding: [0x62,0x81,0x7c,0xaa,0x51,0xd9]
+ vsqrtps %ymm25, %ymm19 {%k2} {z}
+
+// CHECK: vsqrtps (%rcx), %ymm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x51,0x19]
+ vsqrtps (%rcx), %ymm19
+
+// CHECK: vsqrtps 291(%rax,%r14,8), %ymm19
+// CHECK: encoding: [0x62,0xa1,0x7c,0x28,0x51,0x9c,0xf0,0x23,0x01,0x00,0x00]
+ vsqrtps 291(%rax,%r14,8), %ymm19
+
+// CHECK: vsqrtps (%rcx){1to8}, %ymm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x38,0x51,0x19]
+ vsqrtps (%rcx){1to8}, %ymm19
+
+// CHECK: vsqrtps 4064(%rdx), %ymm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x51,0x5a,0x7f]
+ vsqrtps 4064(%rdx), %ymm19
+
+// CHECK: vsqrtps 4096(%rdx), %ymm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x51,0x9a,0x00,0x10,0x00,0x00]
+ vsqrtps 4096(%rdx), %ymm19
+
+// CHECK: vsqrtps -4096(%rdx), %ymm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x51,0x5a,0x80]
+ vsqrtps -4096(%rdx), %ymm19
+
+// CHECK: vsqrtps -4128(%rdx), %ymm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x51,0x9a,0xe0,0xef,0xff,0xff]
+ vsqrtps -4128(%rdx), %ymm19
+
+// CHECK: vsqrtps 508(%rdx){1to8}, %ymm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x38,0x51,0x5a,0x7f]
+ vsqrtps 508(%rdx){1to8}, %ymm19
+
+// CHECK: vsqrtps 512(%rdx){1to8}, %ymm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x38,0x51,0x9a,0x00,0x02,0x00,0x00]
+ vsqrtps 512(%rdx){1to8}, %ymm19
+
+// CHECK: vsqrtps -512(%rdx){1to8}, %ymm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x38,0x51,0x5a,0x80]
+ vsqrtps -512(%rdx){1to8}, %ymm19
+
+// CHECK: vsqrtps -516(%rdx){1to8}, %ymm19
+// CHECK: encoding: [0x62,0xe1,0x7c,0x38,0x51,0x9a,0xfc,0xfd,0xff,0xff]
+ vsqrtps -516(%rdx){1to8}, %ymm19
+
// CHECK: vmovapd %xmm22, (%rcx)
// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x29,0x31]
vmovapd %xmm22, (%rcx)
Modified: llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp?rev=220806&r1=220805&r2=220806&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp (original)
+++ llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp Tue Oct 28 13:15:20 2014
@@ -171,12 +171,17 @@ static inline bool inheritsFrom(Instruct
case IC_EVEX_OPSIZE:
return inheritsFrom(child, IC_EVEX_W_OPSIZE) ||
inheritsFrom(child, IC_EVEX_L_W_OPSIZE);
+ case IC_EVEX_B:
+ return false;
case IC_EVEX_W:
case IC_EVEX_W_XS:
case IC_EVEX_W_XD:
case IC_EVEX_W_OPSIZE:
return false;
case IC_EVEX_L:
+ case IC_EVEX_L_K_B:
+ case IC_EVEX_L_KZ_B:
+ case IC_EVEX_L_B:
case IC_EVEX_L_XS:
case IC_EVEX_L_XD:
case IC_EVEX_L_OPSIZE:
More information about the llvm-commits
mailing list