[PATCH] [asan-asm-instrumentation] Added comment describing how asm instrumentation works.

Yuri Gorshenin ygorshenin at chromium.org
Mon Oct 27 01:48:49 PDT 2014


Many thanks!

================
Comment at: lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp:46
@@ +45,3 @@
+// of the instuction opcode - if an instruction has a memory operand
+// (for instance, movq (%rsi, %rcx, 8), %rax) - it's a strong signal
+// that it should be instrumented.  But there're also exist instructions
----------------
eugenis wrote:
> That's not how the code works, is it? We look at the opcode to find the access size.
Done.

================
Comment at: lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp:68
@@ +67,3 @@
+// JZ .Done  # when shadow equals to zero, everything is fine
+// MOV AddressReg, RDI
+// # Call __asan_report function with AddressReg as an argument
----------------
eugenis wrote:
> Why not do LEA MemOp, RDI and use the same register for AddressReg and ShadowReg, spilling 1 register instead of 2?
> 
Because we need to spill RDI and a one more register for AddressReg/ShadowReg, so 2 registers in total.

================
Comment at: lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp:93
@@ +92,3 @@
+// * Debug info (usually, DWARF) should be adjusted, because when
+//   inline assembly is in a leaf function, RSP is usually used as a
+//   frame register. So, we need to select some register as a frame
----------------
eugenis wrote:
> This is not really about leaf functions, but rather about the -fno-omit-frame-pointer setting, the presence of dynamic allocas, etc. It just happens.
Done.

http://reviews.llvm.org/D5970






More information about the llvm-commits mailing list