[llvm] r220368 - R600/SI: Add failing testcase reduced from OpenCV
Matt Arsenault
Matthew.Arsenault at amd.com
Tue Oct 21 21:26:10 PDT 2014
Author: arsenm
Date: Tue Oct 21 23:26:10 2014
New Revision: 220368
URL: http://llvm.org/viewvc/llvm-project?rev=220368&view=rev
Log:
R600/SI: Add failing testcase reduced from OpenCV
This fails the verifier with:
"Expected a VCSrc_32 register, but got a VReg_1 register"
Added:
llvm/trunk/test/CodeGen/R600/v-cmp-vreg1-src-error.ll
Added: llvm/trunk/test/CodeGen/R600/v-cmp-vreg1-src-error.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/v-cmp-vreg1-src-error.ll?rev=220368&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/R600/v-cmp-vreg1-src-error.ll (added)
+++ llvm/trunk/test/CodeGen/R600/v-cmp-vreg1-src-error.ll Tue Oct 21 23:26:10 2014
@@ -0,0 +1,22 @@
+; XFAIL: *
+; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s
+
+define void @init_data_cost_reduce_0(i32 %arg) #0 {
+bb:
+ br i1 undef, label %bb1, label %bb2
+
+bb1: ; preds = %bb
+ br label %bb2
+
+bb2: ; preds = %bb1, %bb
+ br i1 undef, label %bb3, label %bb4
+
+bb3: ; preds = %bb2
+ %tmp = mul i32 undef, %arg
+ br label %bb4
+
+bb4: ; preds = %bb3, %bb2
+ unreachable
+}
+
+attributes #0 = { nounwind }
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