[www] r220125 - Add talk descriptions.

[Tanya Lattner]

Author: tbrethou
Date: Sat Oct 18 00:08:28 2014
New Revision: 220125

URL: http://llvm.org/viewvc/llvm-project?rev=220125&view=rev
Log:
Add talk descriptions. 

Modified:
    www/trunk/devmtg/2014-10/index.html

Modified: www/trunk/devmtg/2014-10/index.html
URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2014-10/index.html?rev=220125&r1=220124&r2=220125&view=diff
==============================================================================
--- www/trunk/devmtg/2014-10/index.html (original)
+++ www/trunk/devmtg/2014-10/index.html Sat Oct 18 00:08:28 2014
@@ -132,7 +132,7 @@ Please sign up for the LLVM Developers'
   <tr><th>Time</th><th>Talk</th><th>Location</th></tr>
 
   <tr><td>8:00 - 9:00</td><td>Breakfast</td><td>Oak Fir Foyer</td></tr>
-  <tr class="alt"><td>9:00 - 9:45</td><td><b><a href="#talk8">Swift's High-Level IR: A Case Study of Complementing LLVM IR with Language-Specific Optimization</a></b><br>John McCall, <i>Apple</i><br>Joe Groff, <i>Apple</i></td><td>Oak Fir</td></tr>
+  <tr class="alt"><td>9:00 - 9:45</td><td><b><a href="#talk8">Swift's High-Level IR: A Case Study of Complementing LLVM IR with Language-Specific Optimization</a></b><br>Chris Lattner, <i>Apple</i><br>Joe Groff, <i>Apple</i></td><td>Oak Fir</td></tr>
 
 <tr><td rowspan=3>9:45 - 10:30</td><td><b><a href="#talk9">What does it take to get LLVM as performant as GCC</a></b><br>James Molloy, <i>ARM</i></td><td>Oak Fir</td></tr>
 <tr><td><b><a href="#talk10">Blowing up the Atomic Barrier</a></b><br>Robin Morisset, <i>Google</i></td><td>Pine</td></tr>
@@ -176,6 +176,212 @@ Please sign up for the LLVM Developers'
 </table>
 </p>
 
+<div class="www_sectiontitle" id="abstracts">Talk Abstracts</div>
+
+<p>
+<b><a id="talk1">OpenMP Support in Clang/LLVM: Status Update and Future Directions
+</a></b><br>
+<i>Alexey Bataev - Intel,  Zinovy Nis - Intel</i><br>
+OpenMP is a well-known and widely used API for shared-memory parallelism. Support for OpenMP in Clang/LLVM compiler is currently under development. In this talk, we will present current status of OpenMP support, what is done and what remains to be done, technical details behind OpenMP implementation. Also, we will elaborate on accelerators and pragma-assisted SIMD vectorization, introduced in the latest 4.0 edition of the OpenMP standard.
+</p>
+
+<p>
+<b><a id="talk2">Alive: Provably Correct InstCombine Optimizations
+</a></b><br>
+<i>Nuno Lopes - Microsoft Research, David Menendez - Rutgers University (Speaker), Santosh Nagarakatte - Rutgers University
+John Regehr - University of Utah
+</i><br>
+Optimizations are hard to get right. Even seemingly innocuous transformations in InstCombine can miss important corner cases. With Alive, you can specify peephole optimizations in a friendly, LLVM-like language, automatically determine their correctness, and generate the corresponding C++ code. 
+</p>
+
+<p>
+<b><a id="talk3">LLVM Stable Releases
+</a></b><br>
+<i>Tom Stellard - Advanced Micro Devices</i><br>
+This talk will cover LLVM stable releases, how they work, who uses them,
+and how we can make them better.
+</p>
+
+<p>
+<b><a id="talk4">Supporting Precise Relocating Garbage Collection in LLVM
+</a></b><br>
+<i>Philip Reames, Azul Systems (Speaker), Sanjoy Das - Azul Systems</i><br>
+Generating efficient code that is compatible with common high performance garbage collector implementations will strengthen LLVM's ability to support languages with managed runtime environments. To support this common use case, we have built and are in the process of contributing a set of intrinsics which can be used to represent interactions with the garbage collector without requiring core change to LLVM, and a safepoint insertion pass which can rewrite optimized IR into a form which respects the invariants required by a fully relocating garbage collector.  We'll cover the motivation, high level design, and show off some running examples.
+</p>
+
+<p>
+<b><a id="talk5">Source Code Analysis for Security through LLVM
+</a></b><br>
+<i>Lu Zhao - HP Fortify</i><br>
+We added a new debug mode for the Clang compiler which emits extra metadata in the LLVM bitcode. The metadata has turned the bitcode into a useful vehicle from which an intermediate representation for secure source code analysis can be derived. We have used this approach to find security vulnerabilities in the Objective-C source code.
+</p>
+
+<p>
+<b><a id="talk6">FTL: WebKit’s LLVM based JIT
+</a></b><br>
+<i>Andrew Trick - Apple, Juergen Ributzka - Apple</i><br>
+FTL is the fourth-tier LLVM JIT that powers JavaScript in WebKit. We will talk about our experiences using LLVM to build this high-performance JIT. We will explain the motivation for new LLVM features, including patchpoints and a new form of stack maps, and will share our vision on future work and the direction we would like LLVM move to become a better platform for JIT clients.
+</p>
+
+
+<p>
+<b><a id="talk7">Virtual Ghost: Using LLVM to Protect Applications from a Compromised Operating System
+</a></b><br>
+<i>John Criswell - University of Rochester</i><br>
+This talk presents an LLVM-based system named Virtual Ghost that protects applications from a compromised operating system kernel.  Virtual Ghost uses compiler instrumentation to protect application data from spying and corruption from the operating system kernel.  It also uses an extended version of the LLVM instruction set to restrict how the operating system kernel can interact with the hardware, preventing the operating system kernel from using hardware configuration to corrupt application control-flow or to bypass the application data protection guarantees.
+</p>
+
+<p>
+<b><a id="talk8">Swift's High-Level IR: A Case Study of Complementing LLVM IR with Language-Specific Optimization
+</a></b><br>
+<i>Chris Lattner - Apple, 
+Joe Groff - Apple</i><br>
+The Swift programming language is built on LLVM and uses LLVM IR and the LLVM backend for code generation, but it also contains a new high-level IR called SIL to model the semantics of the language (and perform optimizations) at a higher level. Â  In this talk, we discuss the motivations and applications of SIL, including high-level semantic analyses and transformations such as flow-dependent diagnostics, devirtualization, specialization, reference counting optimization, and TBAA, and we compare SIL's design with that of LLVM IR.
+</p>
+
+<p>
+<b><a id="talk9">What does it take to make LLVM as performant as GCC
+</a></b><br>
+<i>James Molloy - ARM (Speaker), 
+Ana Pass - QuIC (Speaker), 
+Yin Ma, QuIC
+</i><br>
+For the past 7 months Qualcomm and ARM have jointly been analyzing and improving performance for the AArch64 architecture in LLVM, based on a differential analysis against GCC. This talk aims to provide information on the areas that we're currently lacking compared to GCC, along with the progress that we've made so far.
+</p>
+
+<p>
+<b><a id="talk10">Blowing up the Atomic Barrier
+</a></b><br>
+<i>Robin Morisset - Google (Speaker), 
+JF Bastien -  Google</i><br>
+Atomics in C11 and C++11 let the programmer express the guarantees needed for racy accesses in lock-free code, in theory bringing a zero-cost abstraction for parallelism to the language. This talk will showcase how you can use atomics today and where the abstraction breaks down. We’ll focus on LLVM’s recent improvements for atomics that provide significant performance gains on ARMv7, Power and x86. Finally we’ll discuss some extremely non-intuitive behaviors of atomics, how atomics in C++ may evolve, and how it may impact LLVM.
+</p>
+
+<p>
+<b><a id="talk11">The LLVM Pass Manager, Part 2
+</a></b><br>
+<i>Chandler Carruth - Google</i><br>
+I will present a new design and implementation of the LLVM pass manager that is currently being developed in the tree. I will cover how it differs from the previous implementation and how those differences allow it to solve many of the long-standing limitations of the current implementation. I will discuss in depth how the new system supports richer analysis dependencies, flexible composition of function-level analyses and module- or call-graph-level transformations. The new pass manager also introduces a caching-based scheduling model which is substantially different from the prior ones and critical to understanding the impact of transitioning. And as I go through these topics I will introduce how to write a pass suitable for the new infrastructure and how to port an existing pass to live happily in both.
+<br>
+Finally, I will show a specific new call-graph analysis used by the new pass manager and discuss how these two components can be used to parallelize the entire LLVM compilation pipeline. I will mention some of the basic correctness and efficiency challenges faced when running in parallel and detail the specific challenges and constraints pursuing this path would impose on analysis and optimization passes.
+</p>
+
+<p>
+<b><a id="talk12">Supporting Vector Programming on a Bi-Endian Processor Architecture
+</a></b><br>
+<i>Bill Schmidt - IBM (Speaker),
+Michael Gschwind - IBM</i><br>
+The POWER instruction set architecture is designed to support both
+big-endian and little-endian memory models. Â However, many of the
+instructions designed for vector support assume that vector elements in
+registers appear in big endian order, that is, with the lowest-numbered
+vector element in the most significant portion of the register. Â This
+talk will outline some of the issues faced in designing a sensible
+vector programming model on a bi-endian architecture with a big-endian
+bias, and how we've addressed them. Â We will also discuss the current
+status of implementation in the GCC and Clang/LLVM compilers.
+</p>
+
+<p>
+<b><a id="talk13">Intrinsics, Metadata and Attributes: Now, more than ever!
+</a></b><br>
+<i>Hal Finkel - Argonne National Laboratory</i><br>
+Over the past year, LLVM has grown several new ways to communicate important information to the optimizer: An @llvm.assume intrinsic function to provided additional truths, scoped-noalias metadata to provided explicit pointer aliasing sets, and parameter attributes that specify pointer alignment, dereferenceability, and more. I'll explain the semantics of many of these new features, their intended uses, and a few ways they shouldn't be used. Finally, I'll discuss how Clang exposes and leverages these new features to encourage the generation of higher-performance code.
+</p>
+
+<p>
+<b><a id="talk14">Implementing Data Layout Optimizations in LLVM Framework
+</a></b><br>
+<i>Prashantha NR, Compiler Tree Technologies (Speaker), Vikram TV - Compiler Tree Technologies,
+		Â  Â Vaivaswatha N - Compiler Tree Technologies</i><br>
+Modern server workloads are limited by memory bandwidth. For regular accesses like loops, people change the loop iterations to change the access pattern; thereby gaining locality. Another way to alleviate the memory bottleneck is to change the data layout organization for better locality. In this talk we will speak about memory layout optimizations like Structure Splitting, Instance Interleaving, Struct Array copy, Array Remapping in LLVM compiler framework.
+</p>
+
+<p>
+<b><a id="talk15">Fuzzing Clang to Find ABI Bugs
+</a></b><br>
+<i>David Majnemer - Google</i><br>
+Correctly implementing C++ is very hard, bugs can arise from incredibly subtle interactions of different language features.
+In this talk, we will discuss how we used fuzzing to dramatically increase the reliability of Clang's ABI-specific code.
+</p>
+
+
+<p>
+<b><a id="talk16">A closer look at ARM code quality
+</a></b><br>
+<i>Tilmann Scheller - Samsung Electronics</i><br>
+This talk presents current performance numbers for the SPEC CPU benchmark
+suites on ARM, comparing the performance of LLVM and GCC, with the main
+focus on the SPEC CPU integer benchmarks.
+To dive a little bit deeper, we will also have a closer look at the
+generated assembly code of selected benchmarks where LLVM is performing
+worse than GCC.
+We will use the results of this performance analysis to point out potential
+code generation opportunities for LLVM.
+</p>
+
+
+<p>
+<b><a id="talk17">Implementation of global instruction scheduling in LLVM infrastructure
+</a></b><br>
+<i>Sergei Larin - QuIC (Speaker), Â Aditya Kumar - QuIC (Speaker)</i><br>
+Discuss perspectives and tradeoffs in implementation of global instruction scheduling and support for it in the LLVM infrastructure. Present and discuss relative QuIC experience.
+</p>
+
+<p>
+<b><a id="talk18">Skip the FFI: Embedding Clang for C Interoperability
+</a></b><br>
+<i>Jordan Rose - Apple (Speaker)
+John McCall - Apple (Speaker)</i><br>
+Most languages that aren't a superset of C provide a Foreign Function Interface (FFI) that allows one to interface with existing C libraries. FFIs are often an afterthought, requiring manual or source-to-source translation from C header files to a subset of the target language, resulting in complicated build processes, frequent manual tweaking, and numerous implementation challenges. 
+<br>
+This talk will discuss an alternative approach that embeds Clang into an LLVM-based compiler front end to provide C compatibility without the traditional FFI. Embedding Clang provides seamless access to C APIs, moving the translation of APIs from external tools into the compiler itself. Moreover, one can leverage Clang's deep knowledge of C record layout and calling conventions to simplify the C interface and make both bring up and porting of a new compiler front end simpler.
+</p>
+
+<p>
+<b><a id="talk19">Custom Hardware State-Machines and Datapaths: Using LLVM to Generate FPGA Accelerators
+</a></b><br>
+<i>Alan Baker - Altera Corporation</i><br>
+Altera Corporation’s OpenCL compiler uses LLVM to generate FPGA accelerators. In order to generate efficient hardware, many transformations were implemented. The key transformations will be discussed, emphasizing the FPGA vs CPU architectural differences that motivate them.
+</p>
+
+<p>
+<b><a id="talk20">Controlling Virtual Register Pressure in LLVM Middle-End
+</a></b><br>
+<i>Ivan Baev - QuIC</i><br>
+Enabling new compiler optimizations or compiling at higher optimization levels do not necessarily improve performance. One common reason is the increased register pressure that results in an increased amount of spill code. We analyze several LLVM target-independent optimizations with respect to register pressure. We then describe algorithms for controlling register pressure in LICM and GVN and report their positive impact on run-time performance. A discussion on how to control register pressure in the inliner concludes the talk.
+</p>
+
+<p>
+<b><a id="talk21">Indexing Large, Mixed-Language Codebases
+</a></b><br>
+<i>James Dennett - Google,
+Luke Zarko - Google (Speaker)</i><br>
+The Kythe project aims to establish open data formats and protocols for
+interoperable developer tools. In this talk, we will introduce the Kythe
+model as it applies to C++14, concentrating on features required for generating
+cross-references. In the process, we will discuss how the Clang front-end
+was instrumental in developing an indexing tool that produces Kythe data
+describing C++ source code.
+</p>
+
+<p>
+<b><a id="talk22">Architecture Specific Code Generation and Function Multiversioning
+</a></b><br>
+<i>Eric Christopher - Google</i><br>
+A talk on microarchitecture dependent optimization and code generation
+for individual functions, the changes that have been necessary to
+enable it, and function multiversioning as the next step.
+</p>
+
+<p>
+<b><a id="talk23">Frappé: Using Clang to Query and Visualize Large Codebases
+</a></b><br>
+<i>Nathan Hawes - Oracle (Speaker), 
+Ben Barham - Oracle (Speaker)</i><br>
+Frappé is a new tool to support developers with a range of code comprehension queries in multi-million line codebases, from "Does function X or something it calls write to global variable Y?" to "How much code could be affected if I change this macro?".  Results are overlaid on a visualisation of the code based on a cartographic map, where the continent/country/state hierarchy corresponds to the code equivalent: high-level architectural components down to individual files and functions. This allows users to visually filter results based on their location and more immediately guage their number and locality.
+</p>
+
 
 <div class="www_sectiontitle" id="logistics">Logistics</div>
 <p>