[PATCH] R600/SI: Allow commuting some 3 op instructions

[Matt Arsenault]

e.g. v_mad_f32 a, b, c -> v_mad_f32 b, a, c
    
This simplifies matching v_madmk_f32.
    
This looks somewhat surprising, but it appears to be
OK to do this. We can commute src0 and src1 in all
of these instructions, and that's all that appears
to matter.

http://reviews.llvm.org/D5854

Files:
  lib/Target/R600/SIInstructions.td
  test/CodeGen/R600/fma.ll
  test/CodeGen/R600/fmuladd.ll
  test/CodeGen/R600/llvm.AMDGPU.umad24.ll
  test/CodeGen/R600/use-sgpr-multiple-times.ll
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