[llvm] r220091 - R600/SI: Remove redundant setting of instruction bits

Matt Arsenault Matthew.Arsenault at amd.com
Fri Oct 17 14:13:11 PDT 2014


Author: arsenm
Date: Fri Oct 17 16:13:11 2014
New Revision: 220091

URL: http://llvm.org/viewvc/llvm-project?rev=220091&view=rev
Log:
R600/SI: Remove redundant setting of instruction bits

These are all set on the instruction base classes.

Modified:
    llvm/trunk/lib/Target/R600/SIInstructions.td

Modified: llvm/trunk/lib/Target/R600/SIInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstructions.td?rev=220091&r1=220090&r2=220091&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstructions.td (original)
+++ llvm/trunk/lib/Target/R600/SIInstructions.td Fri Oct 17 16:13:11 2014
@@ -1509,16 +1509,12 @@ defm V_CUBETC_F32 : VOP3Inst <vop3<0x146
 defm V_CUBEMA_F32 : VOP3Inst <vop3<0x147>, "V_CUBEMA_F32",
   VOP_F32_F32_F32_F32
 >;
-
-let neverHasSideEffects = 1, mayLoad = 0, mayStore = 0 in {
 defm V_BFE_U32 : VOP3Inst <vop3<0x148>, "V_BFE_U32",
   VOP_I32_I32_I32_I32, AMDGPUbfe_u32
 >;
 defm V_BFE_I32 : VOP3Inst <vop3<0x149>, "V_BFE_I32",
   VOP_I32_I32_I32_I32, AMDGPUbfe_i32
 >;
-}
-
 defm V_BFI_B32 : VOP3Inst <vop3<0x14a>, "V_BFI_B32",
   VOP_I32_I32_I32_I32, AMDGPUbfi
 >;





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