[PATCH] LLVM codegen test cases updated to check instructions generated when VSX is activated on Power

[Bill Schmidt]

The reason for the test is to correct the tests that generate different code when VSX is enabled (usually a vector-scalar version of the floating-point instruction, which has identical behavior but allows selection from 64 floating-point registers instead of 32).  Hal already added quite a large number of VSX tests, and these complement those.

I should have commented on the newline -- I corrected that when I was testing his patch, so when i commit it that will be fixed.

http://reviews.llvm.org/D5759