[llvm] r219501 - [PowerPC] Add feature for Power8 vector extensions
Bill Schmidt
wschmidt at linux.vnet.ibm.com
Fri Oct 10 09:54:28 PDT 2014
On Fri, 2014-10-10 at 11:17 -0500, Hal Finkel wrote:
> ----- Original Message -----
> > From: "Bill Schmidt" <wschmidt at linux.vnet.ibm.com>
> > To: llvm-commits at cs.uiuc.edu
> > Sent: Friday, October 10, 2014 10:09:29 AM
> > Subject: [llvm] r219501 - [PowerPC] Add feature for Power8 vector extensions
> >
> > Author: wschmidt
> > Date: Fri Oct 10 10:09:28 2014
> > New Revision: 219501
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=219501&view=rev
> > Log:
> > [PowerPC] Add feature for Power8 vector extensions
> >
> > The current VSX feature for PowerPC specifies availability of the VSX
> > instructions added with the 2.06 architecture version. With 2.07,
> > the
> > architecture adds new instructions to both the Category:Vector and
> > Category:VSX instruction sets. Additionally, unaligned vector
> > storage
> > operations have improved performance.
> >
> > This patch adds a feature to provide access to the new instructions
> > and performance capabilities of Power8. For compatibility with GCC,
> > the feature is controlled via a new -mpower8-vector switch, and the
> > feature causes the __POWER8_VECTOR__ builtin define to be generated
> > by
> > the preprocessor.
> >
> > There is a companion patch for cfe being committed at the same time.
> >
> > Modified:
> > llvm/trunk/lib/Target/PowerPC/PPC.td
> > llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
> > llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h
> >
> > Modified: llvm/trunk/lib/Target/PowerPC/PPC.td
> > URL:
> > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPC.td?rev=219501&r1=219500&r2=219501&view=diff
> > ==============================================================================
> > --- llvm/trunk/lib/Target/PowerPC/PPC.td (original)
> > +++ llvm/trunk/lib/Target/PowerPC/PPC.td Fri Oct 10 10:09:28 2014
> > @@ -104,6 +104,10 @@ def FeatureQPX : SubtargetFeature<
> > def FeatureVSX : SubtargetFeature<"vsx","HasVSX", "true",
> > "Enable VSX instructions",
> > [FeatureAltivec]>;
> > +def FeaturePower8Vector : SubtargetFeature<"power8-vector",
> > "HasPower8Vector",
>
> For all these backend things, I prefer less typing when doing so does not reduce clarity... can we please abbreviate this as FeatureP8Vector instead of spelling-out 'Power'. Furthermore, I find calling it 'vector' somewhat misleading because it refers to more than just vector instructions, but the P8 extensions to VSX generally. So I think that FeatureP8VSX is a better name. Same for all of the other variables, etc.
Actually, FeatureP8VSX would be misleading, because instructions are
added for the VMX instructions (Category:Vector) as well as the VSX
instructions (Category:VSX). Hence the general term "vector" seems
better to me. It also matches the option name and the GCC usage.
However, I'm happy to reduce this to FeatureP8Vector.
>
> > + "true",
> > + "Enable Power8 vector
> > instructions",
>
> It looks like IBM's preferred spelling is POWER8, and I'd like to keep a consistent spelling across the code base, and thus far, we've been using all caps for the others.
Agreed - rather surprised I typed it this way. :) I'll fix that.
Thanks,
Bill
>
> Thanks again,
> Hal
>
> > + [FeatureVSX,
> > FeatureAltivec]>;
> >
> > def DeprecatedMFTB : SubtargetFeature<"", "DeprecatedMFTB",
> > "true",
> > "Treat mftb as deprecated">;
> > @@ -116,7 +120,6 @@ def DeprecatedDST : SubtargetFeature<
> > // CMPB p6, p6x, p7 cmpb
> > // DFP p6, p6x, p7 decimal floating-point
> > instructions
> > // POPCNTB p5 through p7 popcntb and related instructions
> > -// VSX p7 vector-scalar instruction set
> >
> > //===----------------------------------------------------------------------===//
> > // ABI Selection
> > //
> >
> > Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
> > URL:
> > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp?rev=219501&r1=219500&r2=219501&view=diff
> > ==============================================================================
> > --- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp (original)
> > +++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp Fri Oct 10
> > 10:09:28 2014
> > @@ -94,6 +94,7 @@ void PPCSubtarget::initializeEnvironment
> > HasSPE = false;
> > HasQPX = false;
> > HasVSX = false;
> > + HasPower8Vector = false;
> > HasFCPSGN = false;
> > HasFSQRT = false;
> > HasFRE = false;
> > @@ -155,8 +156,10 @@ void PPCSubtarget::initSubtargetFeatures
> >
> > // FIXME: For now, we disable VSX in little-endian mode until
> > endian
> > // issues in those instructions can be addressed.
> > - if (IsLittleEndian)
> > + if (IsLittleEndian) {
> > HasVSX = false;
> > + HasPower8Vector = false;
> > + }
> >
> > // Determine default ABI.
> > if (TargetABI == PPC_ABI_UNKNOWN) {
> >
> > Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h
> > URL:
> > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h?rev=219501&r1=219500&r2=219501&view=diff
> > ==============================================================================
> > --- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h (original)
> > +++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h Fri Oct 10 10:09:28
> > 2014
> > @@ -91,6 +91,7 @@ protected:
> > bool HasSPE;
> > bool HasQPX;
> > bool HasVSX;
> > + bool HasPower8Vector;
> > bool HasFCPSGN;
> > bool HasFSQRT;
> > bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
> > @@ -215,6 +216,7 @@ public:
> > bool hasSPE() const { return HasSPE; }
> > bool hasQPX() const { return HasQPX; }
> > bool hasVSX() const { return HasVSX; }
> > + bool hasPower8Vector() const { return HasPower8Vector; }
> > bool hasMFOCRF() const { return HasMFOCRF; }
> > bool hasISEL() const { return HasISEL; }
> > bool hasPOPCNTD() const { return HasPOPCNTD; }
> >
> >
> > _______________________________________________
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> > llvm-commits at cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> >
>
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