[PATCH] [llvm] [Hexagon] Adding tests, TableGen entries, and code for emitting add opcode.
Rafael Ávila de Espíndola
rafael.espindola at gmail.com
Wed Oct 8 13:12:55 PDT 2014
================
Comment at: unittests/MC/Hexagon/HexagonMCCodeEmitterTest.cpp:57
@@ +56,3 @@
+/// \brief Instruction encoding with different register numbers
+TEST(HexagonMCCodeEmitter, add_Rd_Rs_Rt) {
+ std::string str;
----------------
Why can't you test this with llvm-mc? It seems a much better way of testing this then by manually creating instructions in a unit test.
http://reviews.llvm.org/D5624
More information about the llvm-commits
mailing list