[llvm] r218657 - [x86] Add some vector-register broadcast operations to the 256-bit v4
Chandler Carruth
chandlerc at gmail.com
Mon Sep 29 19:32:38 PDT 2014
Author: chandlerc
Date: Mon Sep 29 21:32:36 2014
New Revision: 218657
URL: http://llvm.org/viewvc/llvm-project?rev=218657&view=rev
Log:
[x86] Add some vector-register broadcast operations to the 256-bit v4
tests which were missing them.
Modified:
llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll?rev=218657&r1=218656&r2=218657&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll Mon Sep 29 21:32:36 2014
@@ -3,6 +3,21 @@
target triple = "x86_64-unknown-unknown"
+define <4 x double> @shuffle_v4f64_0000(<4 x double> %a, <4 x double> %b) {
+; AVX1-LABEL: @shuffle_v4f64_0000
+; AVX1: # BB#0:
+; AVX1-NEXT: vunpcklpd {{.*}} # xmm0 = xmm0[0,0]
+; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: @shuffle_v4f64_0000
+; AVX2: # BB#0:
+; AVX2-NEXT: vpermpd {{.*}} # ymm0 = ymm0[0,0,0,0]
+; AVX2-NEXT: retq
+ %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 0>
+ ret <4 x double> %shuffle
+}
+
define <4 x double> @shuffle_v4f64_0001(<4 x double> %a, <4 x double> %b) {
; AVX1-LABEL: @shuffle_v4f64_0001
; AVX1: # BB#0:
@@ -293,6 +308,21 @@ define <4 x double> @shuffle_v4f64_0167(
ret <4 x double> %shuffle
}
+define <4 x i64> @shuffle_v4i64_0000(<4 x i64> %a, <4 x i64> %b) {
+; AVX1-LABEL: @shuffle_v4i64_0000
+; AVX1: # BB#0:
+; AVX1-NEXT: vunpcklpd {{.*}} # xmm0 = xmm0[0,0]
+; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: @shuffle_v4i64_0000
+; AVX2: # BB#0:
+; AVX2-NEXT: vpermq {{.*}} # ymm0 = ymm0[0,0,0,0]
+; AVX2-NEXT: retq
+ %shuffle = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 0>
+ ret <4 x i64> %shuffle
+}
+
define <4 x i64> @shuffle_v4i64_0001(<4 x i64> %a, <4 x i64> %b) {
; AVX1-LABEL: @shuffle_v4i64_0001
; AVX1: # BB#0:
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