[PATCH] R600/SI: Fix hardcoded values for modifiers.

[Tom Stellard]

On Mon, Sep 29, 2014 at 03:28:54PM +0000, Matt Arsenault wrote:
> Move enums to SIDefines.h
> 
> http://reviews.llvm.org/D5521

LGTM.

> 
> Files:
>   lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
>   lib/Target/R600/SIDefines.h
>   lib/Target/R600/SIInsertWaits.cpp
>   lib/Target/R600/SIInstrInfo.h

> Index: lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
> ===================================================================
> --- lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
> +++ lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
> @@ -9,6 +9,8 @@
>  //===----------------------------------------------------------------------===//
>  
>  #include "AMDGPUInstPrinter.h"
> +#include "SIDefines.h"
> +
>  #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
>  #include "llvm/MC/MCExpr.h"
>  #include "llvm/MC/MCInst.h"
> @@ -239,12 +241,12 @@
>  void AMDGPUInstPrinter::printOperandAndMods(const MCInst *MI, unsigned OpNo,
>                                              raw_ostream &O) {
>    unsigned InputModifiers = MI->getOperand(OpNo).getImm();
> -  if (InputModifiers & 0x1)
> +  if (InputModifiers & SISrcMods::NEG)
>      O << '-';
> -  if (InputModifiers & 0x2)
> +  if (InputModifiers & SISrcMods::ABS)
>      O << '|';
>    printOperand(MI, OpNo + 1, O);
> -  if (InputModifiers & 0x2)
> +  if (InputModifiers & SISrcMods::ABS)
>      O << '|';
>  }
>  
> Index: lib/Target/R600/SIDefines.h
> ===================================================================
> --- lib/Target/R600/SIDefines.h
> +++ lib/Target/R600/SIDefines.h
> @@ -27,6 +27,22 @@
>  };
>  }
>  
> +namespace SIInstrFlags {
> +  enum Flags {
> +    // First 4 bits are the instruction encoding
> +    VM_CNT = 1 << 0,
> +    EXP_CNT = 1 << 1,
> +    LGKM_CNT = 1 << 2
> +  };
> +}
> +
> +namespace SISrcMods {
> +  enum {
> +   NEG = 1 << 0,
> +   ABS = 1 << 1
> +  };
> +}
> +
>  #define R_00B028_SPI_SHADER_PGM_RSRC1_PS                                0x00B028
>  #define R_00B02C_SPI_SHADER_PGM_RSRC2_PS                                0x00B02C
>  #define   S_00B02C_EXTRA_LDS_SIZE(x)                                  (((x) & 0xFF) << 8)
> Index: lib/Target/R600/SIInsertWaits.cpp
> ===================================================================
> --- lib/Target/R600/SIInsertWaits.cpp
> +++ lib/Target/R600/SIInsertWaits.cpp
> @@ -19,6 +19,7 @@
>  #include "AMDGPU.h"
>  #include "AMDGPUSubtarget.h"
>  #include "SIInstrInfo.h"
> +#include "SIDefines.h"
>  #include "SIMachineFunctionInfo.h"
>  #include "llvm/CodeGen/MachineFunction.h"
>  #include "llvm/CodeGen/MachineFunctionPass.h"
> Index: lib/Target/R600/SIInstrInfo.h
> ===================================================================
> --- lib/Target/R600/SIInstrInfo.h
> +++ lib/Target/R600/SIInstrInfo.h
> @@ -270,20 +270,4 @@
>  
>  } // End namespace llvm
>  
> -namespace SIInstrFlags {
> -  enum Flags {
> -    // First 4 bits are the instruction encoding
> -    VM_CNT = 1 << 0,
> -    EXP_CNT = 1 << 1,
> -    LGKM_CNT = 1 << 2
> -  };
> -}
> -
> -namespace SISrcMods {
> -  enum {
> -   NEG = 1 << 0,
> -   ABS = 1 << 1
> -  };
> -}
> -
>  #endif

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