[compiler-rt] r218519 - [UBSan] Adding support of MIPS32

[Petar Jovanovic]

Author: petarj
Date: Fri Sep 26 09:16:06 2014
New Revision: 218519

URL: http://llvm.org/viewvc/llvm-project?rev=218519&view=rev
Log:
[UBSan] Adding support of MIPS32

Changed files: 
config-ix.cmake: Enabled UBSan for MIPS32
sanitizer_stacktrace.cc: Program counter for MIPS32 is four byte aligned
and a delay slot so subtracted PC by 8 for getting call site address.
cast-overflow.cpp: Added big endian support for this test case.

Patch by Sagar Thakur.

Differential Revision: http://reviews.llvm.org/D4881

Modified:
    compiler-rt/trunk/cmake/config-ix.cmake
    compiler-rt/trunk/lib/sanitizer_common/sanitizer_stacktrace.cc
    compiler-rt/trunk/test/ubsan/TestCases/Float/cast-overflow.cpp

Modified: compiler-rt/trunk/cmake/config-ix.cmake
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/cmake/config-ix.cmake?rev=218519&r1=218518&r2=218519&view=diff
==============================================================================
--- compiler-rt/trunk/cmake/config-ix.cmake (original)
+++ compiler-rt/trunk/cmake/config-ix.cmake Fri Sep 26 09:16:06 2014
@@ -134,7 +134,7 @@ filter_available_targets(LSAN_COMMON_SUP
 filter_available_targets(MSAN_SUPPORTED_ARCH x86_64)
 filter_available_targets(PROFILE_SUPPORTED_ARCH x86_64 i386 arm aarch64)
 filter_available_targets(TSAN_SUPPORTED_ARCH x86_64)
-filter_available_targets(UBSAN_SUPPORTED_ARCH x86_64 i386 arm aarch64)
+filter_available_targets(UBSAN_SUPPORTED_ARCH x86_64 i386 arm aarch64 mips)
 
 if(ANDROID)
   set(OS_NAME "Android")

Modified: compiler-rt/trunk/lib/sanitizer_common/sanitizer_stacktrace.cc
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/sanitizer_common/sanitizer_stacktrace.cc?rev=218519&r1=218518&r2=218519&view=diff
==============================================================================
--- compiler-rt/trunk/lib/sanitizer_common/sanitizer_stacktrace.cc (original)
+++ compiler-rt/trunk/lib/sanitizer_common/sanitizer_stacktrace.cc Fri Sep 26 09:16:06 2014
@@ -25,7 +25,7 @@ uptr StackTrace::GetPreviousInstructionP
 #if defined(__powerpc__) || defined(__powerpc64__)
   // PCs are always 4 byte aligned.
   return pc - 4;
-#elif defined(__sparc__)
+#elif defined(__sparc__) || defined(__mips__)
   return pc - 8;
 #else
   return pc - 1;

Modified: compiler-rt/trunk/test/ubsan/TestCases/Float/cast-overflow.cpp
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/ubsan/TestCases/Float/cast-overflow.cpp?rev=218519&r1=218518&r2=218519&view=diff
==============================================================================
--- compiler-rt/trunk/test/ubsan/TestCases/Float/cast-overflow.cpp (original)
+++ compiler-rt/trunk/test/ubsan/TestCases/Float/cast-overflow.cpp Fri Sep 26 09:16:06 2014
@@ -14,6 +14,7 @@
 
 // This test assumes float and double are IEEE-754 single- and double-precision.
 
+#include <endian.h>
 #include <stdint.h>
 #include <stdio.h>
 #include <string.h>
@@ -41,12 +42,20 @@ int main(int argc, char **argv) {
   unsigned Zero = NearlyMinusOne; // ok
 
   // Build a '+Inf'.
+#if __BYTE_ORDER == __LITTLE_ENDIAN
   char InfVal[] = { 0x00, 0x00, 0x80, 0x7f };
+#else
+  char InfVal[] = { 0x7f, 0x80, 0x00, 0x00 };
+#endif
   float Inf;
   memcpy(&Inf, InfVal, 4);
 
   // Build a 'NaN'.
+#if __BYTE_ORDER == __LITTLE_ENDIAN
   char NaNVal[] = { 0x01, 0x00, 0x80, 0x7f };
+#else
+  char NaNVal[] = { 0x7f, 0x80, 0x00, 0x01 };
+#endif
   float NaN;
   memcpy(&NaN, NaNVal, 4);