[llvm] r218382 - [Thumb] 32-bit encodings of 'cps' are not valid for v7M

[Oliver Stannard]

Author: olista01
Date: Wed Sep 24 09:20:01 2014
New Revision: 218382

URL: http://llvm.org/viewvc/llvm-project?rev=218382&view=rev
Log:
[Thumb] 32-bit encodings of 'cps' are not valid for v7M

v7M only allows the 16-bit encoding of the 'cps' (Change Processor
State) instruction, and does not have the 32-bit encoding which is
valid from v6T2 onwards.


Added:
    llvm/trunk/test/MC/ARM/cps.s
Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=218382&r1=218381&r2=218382&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Sep 24 09:20:01 2014
@@ -3674,7 +3674,8 @@ let isBranch = 1, isTerminator = 1 in {
 // operands, create 3 versions of the same instruction. Once there's a clean
 // framework to represent optional operands, change this behavior.
 class t2CPS<dag iops, string asm_op> : T2XI<(outs), iops, NoItinerary,
-            !strconcat("cps", asm_op), []> {
+            !strconcat("cps", asm_op), []>,
+          Requires<[IsThumb2, IsNotMClass]> {
   bits<2> imod;
   bits<3> iflags;
   bits<5> mode;

Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=218382&r1=218381&r2=218382&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Wed Sep 24 09:20:01 2014
@@ -5514,6 +5514,8 @@ bool ARMAsmParser::ParseInstruction(Pars
     Operands.push_back(ARMOperand::CreateImm(
           MCConstantExpr::Create(ProcessorIMod, getContext()),
                                  NameLoc, NameLoc));
+  } else if (Mnemonic == "cps" && isMClass()) {
+    return Error(NameLoc, "instruction 'cps' requires effect for M-class");
   }
 
   // Add the remaining tokens in the mnemonic.

Added: llvm/trunk/test/MC/ARM/cps.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/cps.s?rev=218382&view=auto
==============================================================================
--- llvm/trunk/test/MC/ARM/cps.s (added)
+++ llvm/trunk/test/MC/ARM/cps.s Wed Sep 24 09:20:01 2014
@@ -0,0 +1,17 @@
+@ RUN: llvm-mc -triple=thumbv6t2--none-eabi -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -triple=thumbv7a--none-eabi -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -triple=thumbv7r--none-eabi -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -triple=thumbv8a--none-eabi -show-encoding < %s | FileCheck %s
+@ RUN: not llvm-mc -triple=thumbv7m--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=UNDEF
+
+  cpsie f
+  cpsie i, #3
+  cps #0
+
+@ CHECK: cpsie f                         @ encoding: [0x61,0xb6]
+@ CHECK: cpsie   i, #3                   @ encoding: [0xaf,0xf3,0x43,0x85]
+@ CHECK: cps     #0                      @ encoding: [0xaf,0xf3,0x00,0x81]
+
+@ UNDEF-DAG: cpsie f                         @ encoding: [0x61,0xb6]
+@ UNDEF-DAG: error: instruction requires:
+@ UNDEF-DAG: error: instruction 'cps' requires effect for M-class