[PATCH] [mips] For indirect calls we don't need $gp to point to .got.

[Sasa Stankovic]

================
Comment at: lib/Target/Mips/MipsISelLowering.cpp:2421
@@ -2416,1 +2420,3 @@
+  // function whose address is taken in the program).
+  if (IsPICCall && !InternalLinkage && GlobalOrExternal) {
     unsigned GPReg = Subtarget.isABI_N64() ? Mips::GP_64 : Mips::GP;
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dsanders wrote:
> I agree that this is equivalent, but is it possible to test for MO_GOT_CALL instead of the conditions that lead to choosing MO_GOT_CALL?
Done.

================
Comment at: test/CodeGen/Mips/prevent-hoisting.ll:13-26
@@ -12,13 +12,16 @@
 
-; The check for "addiu" instruction is added so that we can match the correct "b" instruction.
+; The check for first "addiu" instruction is added so that we can match the correct "b" instruction.
 ; CHECK:           addiu ${{[0-9]+}}, $zero, -1
 ; CHECK:           b $[[BB0:BB[0-9_]+]]
+; CHECK-NEXT:      addiu ${{[0-9]+}}, $zero, 0
 
-; Check that sll instruction that writes to $1 starts basic block.
-; CHECK:       {{BB[0-9_#]+}}: 
+; Check that at the start of a fallthrough block there is a instruction that writes to $1.
+; CHECK-NEXT:  {{BB[0-9_#]+}}: 
+; CHECK-NEXT:      lw      $[[R1:[0-9]+]], %got(assignSE2partition)($[[R2:[0-9]+]])
 ; CHECK-NEXT:      sll $1, $[[R0:[0-9]+]], 4
 
-; Check that identical sll instruction starts another basic block.
+; Check that identical instructions are at the start of a target block.
 ; CHECK:       [[BB0]]:
+; CHECK-NEXT:      lw      $[[R1]], %got(assignSE2partition)($[[R2]])
 ; CHECK-NEXT:      sll $1, $[[R0]], 4
 
----------------
dsanders wrote:
> This is just fixing up a test where the instructions changed order isn't it?
> 
> If so, I feel that there ought to be a more robust way of testing for this. This is close:
>   CHECK-NEXT: {{BB[0-9_#]+}}:
>   CHECK-DAG: sll $1, $[[R0:[0-9]+]], 4
>   CHECK: {{BB[0-9_#]+}}:
>   CHECK: [[BB0]]:
> but there's no guarantee that there will be a second basic block between the two.
> 
> If neither of us can think of anything better, then we should go ahead with this change as-is and maintain it when necessary.
> This is just fixing up a test where the instructions changed order isn't it?

Yes. Currently the following sequence is generated at the start of two blocks:

        sll     $1, $2, 4
        sll     $2, $2, 6
        addu    $1, $2, $1
        lw      $2, %got(assignSE2partition)($16)

CHECK-NEXT checks only for the first instruction (it checks for instructions up to the first one that changes $at, which in this case is the first instruction). After the patch is applied, there are the same 4 instructions at the start of two blocks, but reordered:

        lw      $2, %got(assignSE2partition)($2)
        sll     $1, $3, 4
        sll     $3, $3, 6
        addu    $1, $3, $1

CHECK-NEXTs in the patch now check for first two instructions. Adding CHECK-DAG for all 4 instructions would protect from reordering, but the test must also make sure that all 4 instructions are at the start of the block, and I think that's not possible to do when DAG is used (that is, to combine DAG and NEXT).

http://reviews.llvm.org/D5067