[llvm] r218326 - Just add a fixme about a possibly faster implementation of some atomic loads on some ARM processors

[Robin Morisset]

Author: morisset
Date: Tue Sep 23 13:33:21 2014
New Revision: 218326

URL: http://llvm.org/viewvc/llvm-project?rev=218326&view=rev
Log:
Just add a fixme about a possibly faster implementation of some atomic loads on some ARM processors

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=218326&r1=218325&r2=218326&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Sep 23 13:33:21 2014
@@ -11086,6 +11086,9 @@ bool ARMTargetLowering::shouldExpandAtom
 // are doomed anyway, so defer to the default libcall and blame the OS when
 // things go wrong. Cortex M doesn't have ldrexd/strexd though, so don't emit
 // anything for those.
+// FIXME: ldrd and strd are atomic if the CPU has LPAE (e.g. A15 has that
+// guarantee, see DDI0406C ARM architecture reference manual,
+// sections A8.8.72-74 LDRD)
 bool ARMTargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const {
   unsigned Size = LI->getType()->getPrimitiveSizeInBits();
   return (Size == 64) && !Subtarget->isMClass();