[PATCH] Add AtomicExpandPass::bracketInstWithFences, and use it whenever getInsertFencesForAtomic would trigger in SelectionDAGBuilder

[JF Bastien]

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Comment at: lib/CodeGen/AtomicExpandPass.cpp:168
@@ -119,1 +167,3 @@
+  // sizes than normal loads. For example, the only 64-bit load guaranteed
+  // to be single-copy atomic by ARM is an ldrexd (A3.5.3).
   Value *Val =
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That reminds me: ARM guarantees that `ldrd` and `strd` are atomic if the CPU has LPAE (e.g. A15 has that guarantee, see DDI0406C ARM architecture reference manual, sections A8.8.72-74 LDRD). Could you add this to your list of things to implement (emit `ldrd`/`strd` when appropriate)?

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Comment at: lib/Target/ARM/ARMISelLowering.cpp:11052
@@ -11052,2 +11051,3 @@
   }
+  llvm_unreachable("Unknown fence ordering in emitLeadingFence");
 }
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Fold this into the `default` case for the `switch`.

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Comment at: lib/Target/ARM/ARMISelLowering.cpp:11073
@@ -11073,2 +11072,3 @@
   }
+  llvm_unreachable("Unknown fence ordering in emitTrailingFence");
 }
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Same.

http://reviews.llvm.org/D5179