[llvm] r218142 - Add hsail and amdil64 to Triple
Matt Arsenault
Matthew.Arsenault at amd.com
Fri Sep 19 12:52:11 PDT 2014
Author: arsenm
Date: Fri Sep 19 14:52:11 2014
New Revision: 218142
URL: http://llvm.org/viewvc/llvm-project?rev=218142&view=rev
Log:
Add hsail and amdil64 to Triple
Modified:
llvm/trunk/include/llvm/ADT/Triple.h
llvm/trunk/lib/Support/Triple.cpp
llvm/trunk/unittests/ADT/TripleTest.cpp
Modified: llvm/trunk/include/llvm/ADT/Triple.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Triple.h?rev=218142&r1=218141&r2=218142&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ADT/Triple.h (original)
+++ llvm/trunk/include/llvm/ADT/Triple.h Fri Sep 19 14:52:11 2014
@@ -73,7 +73,10 @@ public:
nvptx64, // NVPTX: 64-bit
le32, // le32: generic little-endian 32-bit CPU (PNaCl / Emscripten)
le64, // le64: generic little-endian 64-bit CPU (PNaCl / Emscripten)
- amdil, // amdil: amd IL
+ amdil, // AMDIL
+ amdil64, // AMDIL with 64-bit pointers
+ hsail, // AMD HSAIL
+ hsail64, // AMD HSAIL with 64-bit pointers
spir, // SPIR: standard portable IR for OpenCL 32-bit version
spir64, // SPIR: standard portable IR for OpenCL 64-bit version
kalimba // Kalimba: generic kalimba
Modified: llvm/trunk/lib/Support/Triple.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=218142&r1=218141&r2=218142&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Triple.cpp (original)
+++ llvm/trunk/lib/Support/Triple.cpp Fri Sep 19 14:52:11 2014
@@ -47,6 +47,9 @@ const char *Triple::getArchTypeName(Arch
case le32: return "le32";
case le64: return "le64";
case amdil: return "amdil";
+ case amdil64: return "amdil64";
+ case hsail: return "hsail";
+ case hsail64: return "hsail64";
case spir: return "spir";
case spir64: return "spir64";
case kalimba: return "kalimba";
@@ -96,8 +99,14 @@ const char *Triple::getArchTypePrefix(Ar
case le32: return "le32";
case le64: return "le64";
- case amdil: return "amdil";
- case spir: return "spir";
+
+ case amdil:
+ case amdil64: return "amdil";
+
+ case hsail:
+ case hsail64: return "hsail";
+
+ case spir:
case spir64: return "spir";
case kalimba: return "kalimba";
}
@@ -204,6 +213,9 @@ Triple::ArchType Triple::getArchTypeForL
.Case("le32", le32)
.Case("le64", le64)
.Case("amdil", amdil)
+ .Case("amdil64", amdil64)
+ .Case("hsail", hsail)
+ .Case("hsail64", hsail64)
.Case("spir", spir)
.Case("spir64", spir64)
.Case("kalimba", kalimba)
@@ -249,6 +261,9 @@ static Triple::ArchType parseArch(String
.Case("le32", Triple::le32)
.Case("le64", Triple::le64)
.Case("amdil", Triple::amdil)
+ .Case("amdil64", Triple::amdil64)
+ .Case("hsail", Triple::hsail)
+ .Case("hsail64", Triple::hsail64)
.Case("spir", Triple::spir)
.Case("spir64", Triple::spir64)
.StartsWith("kalimba", Triple::kalimba)
@@ -789,7 +804,6 @@ static unsigned getArchPointerBitWidth(l
case llvm::Triple::msp430:
return 16;
- case llvm::Triple::amdil:
case llvm::Triple::arm:
case llvm::Triple::armeb:
case llvm::Triple::hexagon:
@@ -805,6 +819,8 @@ static unsigned getArchPointerBitWidth(l
case llvm::Triple::thumbeb:
case llvm::Triple::x86:
case llvm::Triple::xcore:
+ case llvm::Triple::amdil:
+ case llvm::Triple::hsail:
case llvm::Triple::spir:
case llvm::Triple::kalimba:
return 32;
@@ -820,6 +836,8 @@ static unsigned getArchPointerBitWidth(l
case llvm::Triple::sparcv9:
case llvm::Triple::systemz:
case llvm::Triple::x86_64:
+ case llvm::Triple::amdil64:
+ case llvm::Triple::hsail64:
case llvm::Triple::spir64:
return 64;
}
@@ -851,6 +869,7 @@ Triple Triple::get32BitArchVariant() con
break;
case Triple::amdil:
+ case Triple::hsail:
case Triple::spir:
case Triple::arm:
case Triple::armeb:
@@ -878,6 +897,8 @@ Triple Triple::get32BitArchVariant() con
case Triple::ppc64: T.setArch(Triple::ppc); break;
case Triple::sparcv9: T.setArch(Triple::sparc); break;
case Triple::x86_64: T.setArch(Triple::x86); break;
+ case Triple::amdil64: T.setArch(Triple::amdil); break;
+ case Triple::hsail64: T.setArch(Triple::hsail); break;
case Triple::spir64: T.setArch(Triple::spir); break;
}
return T;
@@ -887,7 +908,6 @@ Triple Triple::get64BitArchVariant() con
Triple T(*this);
switch (getArch()) {
case Triple::UnknownArch:
- case Triple::amdil:
case Triple::arm:
case Triple::armeb:
case Triple::hexagon:
@@ -904,13 +924,15 @@ Triple Triple::get64BitArchVariant() con
case Triple::aarch64:
case Triple::aarch64_be:
case Triple::le64:
+ case Triple::amdil64:
+ case Triple::hsail64:
+ case Triple::spir64:
case Triple::mips64:
case Triple::mips64el:
case Triple::nvptx64:
case Triple::ppc64:
case Triple::ppc64le:
case Triple::sparcv9:
- case Triple::spir64:
case Triple::systemz:
case Triple::x86_64:
// Already 64-bit.
@@ -923,6 +945,8 @@ Triple Triple::get64BitArchVariant() con
case Triple::ppc: T.setArch(Triple::ppc64); break;
case Triple::sparc: T.setArch(Triple::sparcv9); break;
case Triple::x86: T.setArch(Triple::x86_64); break;
+ case Triple::amdil: T.setArch(Triple::amdil64); break;
+ case Triple::hsail: T.setArch(Triple::hsail64); break;
case Triple::spir: T.setArch(Triple::spir64); break;
}
return T;
Modified: llvm/trunk/unittests/ADT/TripleTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ADT/TripleTest.cpp?rev=218142&r1=218141&r2=218142&view=diff
==============================================================================
--- llvm/trunk/unittests/ADT/TripleTest.cpp (original)
+++ llvm/trunk/unittests/ADT/TripleTest.cpp Fri Sep 19 14:52:11 2014
@@ -129,6 +129,36 @@ TEST(TripleTest, ParsedIDs) {
EXPECT_EQ(Triple::UnknownOS, T.getOS());
EXPECT_EQ(Triple::EABI, T.getEnvironment());
+ T = Triple("amdil-unknown-unknown");
+ EXPECT_EQ(Triple::amdil, T.getArch());
+ EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+ EXPECT_EQ(Triple::UnknownOS, T.getOS());
+
+ T = Triple("amdil64-unknown-unknown");
+ EXPECT_EQ(Triple::amdil64, T.getArch());
+ EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+ EXPECT_EQ(Triple::UnknownOS, T.getOS());
+
+ T = Triple("hsail-unknown-unknown");
+ EXPECT_EQ(Triple::hsail, T.getArch());
+ EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+ EXPECT_EQ(Triple::UnknownOS, T.getOS());
+
+ T = Triple("hsail64-unknown-unknown");
+ EXPECT_EQ(Triple::hsail64, T.getArch());
+ EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+ EXPECT_EQ(Triple::UnknownOS, T.getOS());
+
+ T = Triple("spir-unknown-unknown");
+ EXPECT_EQ(Triple::spir, T.getArch());
+ EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+ EXPECT_EQ(Triple::UnknownOS, T.getOS());
+
+ T = Triple("spir64-unknown-unknown");
+ EXPECT_EQ(Triple::spir64, T.getArch());
+ EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+ EXPECT_EQ(Triple::UnknownOS, T.getOS());
+
T = Triple("huh");
EXPECT_EQ(Triple::UnknownArch, T.getArch());
}
@@ -341,6 +371,36 @@ TEST(TripleTest, BitWidthPredicates) {
EXPECT_FALSE(T.isArch16Bit());
EXPECT_FALSE(T.isArch32Bit());
EXPECT_TRUE(T.isArch64Bit());
+
+ T.setArch(Triple::amdil);
+ EXPECT_FALSE(T.isArch16Bit());
+ EXPECT_TRUE(T.isArch32Bit());
+ EXPECT_FALSE(T.isArch64Bit());
+
+ T.setArch(Triple::amdil64);
+ EXPECT_FALSE(T.isArch16Bit());
+ EXPECT_FALSE(T.isArch32Bit());
+ EXPECT_TRUE(T.isArch64Bit());
+
+ T.setArch(Triple::hsail);
+ EXPECT_FALSE(T.isArch16Bit());
+ EXPECT_TRUE(T.isArch32Bit());
+ EXPECT_FALSE(T.isArch64Bit());
+
+ T.setArch(Triple::hsail64);
+ EXPECT_FALSE(T.isArch16Bit());
+ EXPECT_FALSE(T.isArch32Bit());
+ EXPECT_TRUE(T.isArch64Bit());
+
+ T.setArch(Triple::spir);
+ EXPECT_FALSE(T.isArch16Bit());
+ EXPECT_TRUE(T.isArch32Bit());
+ EXPECT_FALSE(T.isArch64Bit());
+
+ T.setArch(Triple::spir64);
+ EXPECT_FALSE(T.isArch16Bit());
+ EXPECT_FALSE(T.isArch32Bit());
+ EXPECT_TRUE(T.isArch64Bit());
}
TEST(TripleTest, BitWidthArchVariants) {
@@ -399,6 +459,30 @@ TEST(TripleTest, BitWidthArchVariants) {
T.setArch(Triple::x86_64);
EXPECT_EQ(Triple::x86, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::x86_64, T.get64BitArchVariant().getArch());
+
+ T.setArch(Triple::amdil);
+ EXPECT_EQ(Triple::amdil, T.get32BitArchVariant().getArch());
+ EXPECT_EQ(Triple::amdil64, T.get64BitArchVariant().getArch());
+
+ T.setArch(Triple::amdil64);
+ EXPECT_EQ(Triple::amdil, T.get32BitArchVariant().getArch());
+ EXPECT_EQ(Triple::amdil64, T.get64BitArchVariant().getArch());
+
+ T.setArch(Triple::hsail);
+ EXPECT_EQ(Triple::hsail, T.get32BitArchVariant().getArch());
+ EXPECT_EQ(Triple::hsail64, T.get64BitArchVariant().getArch());
+
+ T.setArch(Triple::hsail64);
+ EXPECT_EQ(Triple::hsail, T.get32BitArchVariant().getArch());
+ EXPECT_EQ(Triple::hsail64, T.get64BitArchVariant().getArch());
+
+ T.setArch(Triple::spir);
+ EXPECT_EQ(Triple::spir, T.get32BitArchVariant().getArch());
+ EXPECT_EQ(Triple::spir64, T.get64BitArchVariant().getArch());
+
+ T.setArch(Triple::spir64);
+ EXPECT_EQ(Triple::spir, T.get32BitArchVariant().getArch());
+ EXPECT_EQ(Triple::spir64, T.get64BitArchVariant().getArch());
}
TEST(TripleTest, getOSVersion) {
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