[PATCH] Optimize sext/zext insertion algorithm in back-end

Jiangning Liu liujiangning1 at gmail.com
Thu Sep 18 21:26:21 PDT 2014


================
Comment at: include/llvm/CodeGen/FunctionLoweringInfo.h:112
@@ +111,3 @@
+  /// for a value.
+  DenseMap<const Value *, ISD::NodeType> PerferredExtendType;
+
----------------
jmolloy wrote:
> s/Perferred/Preferred/
OK. I will fix that.

================
Comment at: test/CodeGen/AArch64/atomic-ops.ll:512
@@ -511,3 +511,3 @@
 
-; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
+; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD_EXT]]
    ret i8 %old
----------------
jmolloy wrote:
> Why the changes to this file?
This is just because this instruction is in the 2nd basic block, and the operand is in the 1st basic block. Previously, the algorithm simply uses ZEXT for all scenarios, and it implies passing a zero-extended value crossing basic block. Now with this patch, the algorithm will prefer to use SEXT, because there is a compare instruction following sxtb generated for LLVM IR "atomicrmw min i8* @var8, i8 %offset acquire" and it is with sign predicate, so now we will prefer to pass sign-extended value crossing basic block.

http://reviews.llvm.org/D5257






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