[llvm] r217821 - Add mips32 r1 to the list of supported targets for Mips fast-isel
Reed Kotler
rkotler at mips.com
Mon Sep 15 13:30:25 PDT 2014
Author: rkotler
Date: Mon Sep 15 15:30:25 2014
New Revision: 217821
URL: http://llvm.org/viewvc/llvm-project?rev=217821&view=rev
Log:
Add mips32 r1 to the list of supported targets for Mips fast-isel
Summary:
Expand list of supported targets for Mips to include mips32 r1.
Previously it only include r2. More patches are coming where there is
a difference but in the current patches as pushed upstream, r1 and r2
are equivalent.
Test Plan:
simplestorefp1.ll
add new build bots at mips to test this flavor at both -O0 and -O2
Reviewers: dsanders
Reviewed By: dsanders
Differential Revision: http://reviews.llvm.org/D5306
Modified:
llvm/trunk/lib/Target/Mips/MipsFastISel.cpp
llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstore2.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/nullvoid.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestore.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll
llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorei.ll
Modified: llvm/trunk/lib/Target/Mips/MipsFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsFastISel.cpp?rev=217821&r1=217820&r2=217821&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsFastISel.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsFastISel.cpp Mon Sep 15 15:30:25 2014
@@ -61,7 +61,8 @@ public:
MFI = funcInfo.MF->getInfo<MipsFunctionInfo>();
Context = &funcInfo.Fn->getContext();
TargetSupported = ((Subtarget->getRelocationModel() == Reloc::PIC_) &&
- (Subtarget->hasMips32r2() && (Subtarget->isABI_O32())));
+ ((Subtarget->hasMips32r2() || Subtarget->hasMips32()) &&
+ (Subtarget->isABI_O32())));
}
bool fastSelectInstruction(const Instruction *I) override;
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstore2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstore2.ll?rev=217821&r1=217820&r2=217821&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstore2.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstore2.ll Mon Sep 15 15:30:25 2014
@@ -6,6 +6,8 @@ target triple = "mips--linux-gnu"
@c1 = common global i8 0, align 1
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \
+; RUN: < %s | FileCheck %s
@s2 = common global i16 0, align 2
@s1 = common global i16 0, align 2
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll?rev=217821&r1=217820&r2=217821&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll Mon Sep 15 15:30:25 2014
@@ -1,5 +1,7 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \
+; RUN: < %s | FileCheck %s
@.str = private unnamed_addr constant [6 x i8] c"hello\00", align 1
@s = common global i8* null, align 4
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/nullvoid.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/nullvoid.ll?rev=217821&r1=217820&r2=217821&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/nullvoid.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/nullvoid.ll Mon Sep 15 15:30:25 2014
@@ -1,5 +1,7 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \
+; RUN: < %s | FileCheck %s
; Function Attrs: nounwind
define void @foo() {
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestore.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestore.ll?rev=217821&r1=217820&r2=217821&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestore.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestore.ll Mon Sep 15 15:30:25 2014
@@ -1,5 +1,7 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \
+; RUN: < %s | FileCheck %s
@abcd = external global i32
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll?rev=217821&r1=217820&r2=217821&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll Mon Sep 15 15:30:25 2014
@@ -1,5 +1,11 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \
+; RUN: < %s | FileCheck %s
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \
; RUN: < %s | FileCheck %s
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \
+; RUN: < %s | FileCheck %s -check-prefix=mips32r2
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \
+; RUN: < %s | FileCheck %s -check-prefix=mips32
@f = common global float 0.000000e+00, align 4
@de = common global double 0.000000e+00, align 8
@@ -23,15 +29,25 @@ entry:
define void @d1() #0 {
entry:
store double 1.234567e+00, double* @de, align 8
-; CHECK: .ent d1
-; CHECK: lui $[[REG1a:[0-9]+]], 16371
-; CHECK: ori $[[REG2a:[0-9]+]], $[[REG1a]], 49353
-; CHECK: lui $[[REG1b:[0-9]+]], 21403
-; CHECK: ori $[[REG2b:[0-9]+]], $[[REG1b]], 34951
-; CHECK: mtc1 $[[REG2b]], $f[[REG3:[0-9]+]]
-; CHECK: mthc1 $[[REG2a]], $f[[REG3]]
-; CHECK: sdc1 $f[[REG3]], 0(${{[0-9]+}})
-; CHECK: .end d1
+; mip32r2: .ent d1
+; mips32r2: lui $[[REG1a:[0-9]+]], 16371
+; mips32r2: ori $[[REG2a:[0-9]+]], $[[REG1a]], 49353
+; mips32r2: lui $[[REG1b:[0-9]+]], 21403
+; mips32r2: ori $[[REG2b:[0-9]+]], $[[REG1b]], 34951
+; mips32r2: mtc1 $[[REG2b]], $f[[REG3:[0-9]+]]
+; mips32r2: mthc1 $[[REG2a]], $f[[REG3]]
+; mips32r2: sdc1 $f[[REG3]], 0(${{[0-9]+}})
+; mips32r2: .end d1
+; mips32: .ent d1
+; mips32: lui $[[REG1a:[0-9]+]], 16371
+; mips32: ori $[[REG2a:[0-9]+]], $[[REG1a]], 49353
+; mips32: lui $[[REG1b:[0-9]+]], 21403
+; mips32: ori $[[REG2b:[0-9]+]], $[[REG1b]], 34951
+; mips32: mtc1 $[[REG2b]], $f[[REG3:[0-9]+]]
+; mips32: mtc1 $[[REG2a]], $f{{[0-9]+}}
+; mips32: sdc1 $f[[REG3]], 0(${{[0-9]+}})
+; mips32: .end d1
+
ret void
}
Modified: llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorei.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorei.ll?rev=217821&r1=217820&r2=217821&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorei.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/simplestorei.ll Mon Sep 15 15:30:25 2014
@@ -1,5 +1,7 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \
+; RUN: < %s | FileCheck %s
@ijk = external global i32
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