[PATCH] Fix float division-by-zero in R600 scheduler

[Alexey Samsonov]

Hi vljn,

Fix a float division by zero reported by UBSan. It was reported
in the following test cases:
    LLVM :: CodeGen/R600/and.ll
    LLVM :: CodeGen/R600/fma.ll
    LLVM :: CodeGen/R600/xor.ll
I'm not sure is actually an accepted value for ALUFetchRationEstimate,
or we should add an assert and fix a bug elsewhere. Please take a look.

http://reviews.llvm.org/D5359

Files:
  lib/Target/R600/R600MachineScheduler.cpp
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