[PATCH] R600/SI: Add some mubuf testcases.

[Tom Stellard]

On Sat, Sep 13, 2014 at 09:07:41PM +0000, Matt Arsenault wrote:
> I noticed some odd looking cases where addr64 wasn't set
> when storing to a pointer in an SGPR. This seems to be intentional,
> and partially tested already.
>     
> The documentation seems to describe addr64 in terms of which registers
> addressing modifiers come from, but I would expect to always need
> addr64 when using 64-bit pointers. If no offset is applied,
> it makes sense to not need to worry about doing a 64-bit add
> for the final address. A small immediate offset can be applied,
> so is it OK to not have addr64 set if a carry is necessary when adding
> the base pointer in the resource to the offset?
> 

I don't think you need addr64 in this case.  My understanding is that the only
time you need addr64 is when the offset in the VGPR is more than 32-bits.

-Tom


> http://reviews.llvm.org/D5345
> 
> Files:
>   test/CodeGen/R600/mubuf.ll

> Index: test/CodeGen/R600/mubuf.ll
> ===================================================================
> --- test/CodeGen/R600/mubuf.ll
> +++ test/CodeGen/R600/mubuf.ll
> @@ -1,5 +1,7 @@
>  ; RUN: llc -march=r600 -mcpu=SI -show-mc-encoding -verify-machineinstrs < %s | FileCheck %s
>  
> +declare i32 @llvm.r600.read.tidig.x() readnone
> +
>  ;;;==========================================================================;;;
>  ;;; MUBUF LOAD TESTS
>  ;;;==========================================================================;;;
> @@ -96,3 +98,35 @@
>    store i32 0, i32 addrspace(1)* %1
>    ret void
>  }
> +
> +; CHECK-LABEL: @store_sgpr_ptr
> +; CHECK: BUFFER_STORE_DWORD v{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, 0
> +define void @store_sgpr_ptr(i32 addrspace(1)* %out) #0 {
> +  store i32 99, i32 addrspace(1)* %out, align 4
> +  ret void
> +}
> +
> +; CHECK-LABEL: @store_sgpr_ptr_offset
> +; CHECK: BUFFER_STORE_DWORD v{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:0x28
> +define void @store_sgpr_ptr_offset(i32 addrspace(1)* %out) #0 {
> +  %out.gep = getelementptr i32 addrspace(1)* %out, i32 10
> +  store i32 99, i32 addrspace(1)* %out.gep, align 4
> +  ret void
> +}
> +
> +; CHECK-LABEL: @store_sgpr_ptr_large_offset
> +; CHECK: BUFFER_STORE_DWORD v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64
> +define void @store_sgpr_ptr_large_offset(i32 addrspace(1)* %out) #0 {
> +  %out.gep = getelementptr i32 addrspace(1)* %out, i32 32768
> +  store i32 99, i32 addrspace(1)* %out.gep, align 4
> +  ret void
> +}
> +
> +; CHECK-LABEL: @store_vgpr_ptr
> +; CHECK: BUFFER_STORE_DWORD v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64
> +define void @store_vgpr_ptr(i32 addrspace(1)* %out) #0 {
> +  %tid = call i32 @llvm.r600.read.tidig.x() readnone
> +  %out.gep = getelementptr i32 addrspace(1)* %out, i32 %tid
> +  store i32 99, i32 addrspace(1)* %out.gep, align 4
> +  ret void
> +}

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