[llvm] r217678 - [mips][microMIPS] Implement BGEZALS and BLTZALS instructions

Zoran Jovanovic zoran.jovanovic at imgtec.com
Fri Sep 12 06:51:58 PDT 2014


Author: zjovanovic
Date: Fri Sep 12 08:51:58 2014
New Revision: 217678

URL: http://llvm.org/viewvc/llvm-project?rev=217678&view=rev
Log:
[mips][microMIPS] Implement BGEZALS and BLTZALS instructions
Differential Revision: http://reviews.llvm.org/D5004

Modified:
    llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
    llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
    llvm/trunk/test/MC/Mips/micromips-branch-instructions.s

Modified: llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp?rev=217678&r1=217677&r2=217678&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp Fri Sep 12 08:51:58 2014
@@ -985,6 +985,8 @@ static bool hasShortDelaySlot(unsigned O
   switch (Opcode) {
     case Mips::JALS_MM:
     case Mips::JALRS_MM:
+    case Mips::BGEZALS_MM:
+    case Mips::BLTZALS_MM:
       return true;
     default:
       return false;

Modified: llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td?rev=217678&r1=217677&r2=217678&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td Fri Sep 12 08:51:58 2014
@@ -115,6 +115,11 @@ let isCall = 1, hasDelaySlot = 1, Defs =
   class JumpLinkRegMM<string opstr, RegisterOperand RO>:
     InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
             [], IIBranch, FrmR>;
+
+  class BranchCompareToZeroLinkMM<string opstr, DAGOperand opnd,
+                                  RegisterOperand RO> :
+    InstSE<(outs), (ins RO:$rs, opnd:$offset),
+           !strconcat(opstr, "\t$rs, $offset"), [], IIBranch, FrmI, opstr>;
 }
 
 def MFHI16_MM : MoveFromHILOMM<"mfhi", GPR32Opnd, AC0>, MFHILO_FM_MM16<0x10>;
@@ -298,6 +303,12 @@ let DecoderNamespace = "MicroMips", Pred
   def BLTZAL_MM : MMRel, BGEZAL_FT<"bltzal", brtarget_mm, GPR32Opnd>,
                   BGEZAL_FM_MM<0x01>;
 
+  /// Branch Instructions - Short Delay Slot
+  def BGEZALS_MM : BranchCompareToZeroLinkMM<"bgezals", brtarget_mm,
+                                             GPR32Opnd>, BGEZAL_FM_MM<0x13>;
+  def BLTZALS_MM : BranchCompareToZeroLinkMM<"bltzals", brtarget_mm,
+                                             GPR32Opnd>, BGEZAL_FM_MM<0x11>;
+
   /// Control Instructions
   def SYNC_MM    : MMRel, SYNC_FT<"sync">, SYNC_FM_MM;
   def BREAK_MM   : MMRel, BRK_FT<"break">, BRK_FM_MM;

Modified: llvm/trunk/test/MC/Mips/micromips-branch-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips-branch-instructions.s?rev=217678&r1=217677&r2=217678&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips-branch-instructions.s (original)
+++ llvm/trunk/test/MC/Mips/micromips-branch-instructions.s Fri Sep 12 08:51:58 2014
@@ -29,6 +29,10 @@
 # CHECK-EL: nop                  # encoding: [0x00,0x00,0x00,0x00]
 # CHECK-EL: bltz $6, 1332        # encoding: [0x06,0x40,0x9a,0x02]
 # CHECK-EL: nop                  # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EL: bgezals $6, 1332     # encoding: [0x66,0x42,0x9a,0x02]
+# CHECK-EL: move $zero, $zero    # encoding: [0x00,0x0c]
+# CHECK-EL: bltzals $6, 1332     # encoding: [0x26,0x42,0x9a,0x02]
+# CHECK-EL: move $zero, $zero    # encoding: [0x00,0x0c]
 #------------------------------------------------------------------------------
 # Big endian
 #------------------------------------------------------------------------------
@@ -52,6 +56,10 @@
 # CHECK-EB: nop                  # encoding: [0x00,0x00,0x00,0x00]
 # CHECK-EB: bltz $6, 1332        # encoding: [0x40,0x06,0x02,0x9a]
 # CHECK-EB: nop                  # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EB: bgezals $6, 1332     # encoding: [0x42,0x66,0x02,0x9a]
+# CHECK-EB: move $zero, $zero    # encoding: [0x0c,0x00]
+# CHECK-EB: bltzals $6, 1332     # encoding: [0x42,0x26,0x02,0x9a]
+# CHECK-EB: move $zero, $zero    # encoding: [0x0c,0x00]
 
      b      1332
      beq    $9,$6,1332
@@ -63,3 +71,5 @@
      bne    $9,$6,1332
      bal    1332
      bltz   $6,1332
+     bgezals $6,1332
+     bltzals $6,1332





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