[llvm] r217622 - [PATCH, PowerPC] Accept 'U' and 'X' constraints in inline asm

[Eric Christopher]

Hi Bill,

Thanks for looking into this. As we chatted about on IRC I don't think this
is the right way to deal with them at the moment. It may be hard (or
impossible) currently for llvm to generate these kinds of memory operands
for inline asm, but with some work I think it'll be possible. I think
you're working up some additional testcases now and we can have those as
the code to include here.

As a note, when you're using a testcase that's just derived straight from C
code it's nice to paste it in the testcase. Also, the comments for the
operands don't seem to match what's right below them - perhaps a FIXME even
or something? :)

Thanks!

-eric

On Thu Sep 11 2014 at 1:23:06 PM Bill Schmidt <wschmidt at linux.vnet.ibm.com>
wrote:

> Author: wschmidt
> Date: Thu Sep 11 15:10:03 2014
> New Revision: 217622
>
> URL: http://llvm.org/viewvc/llvm-project?rev=217622&view=rev
> Log:
> [PATCH, PowerPC] Accept 'U' and 'X' constraints in inline asm
>
> Inline asm may specify 'U' and 'X' constraints to print a 'u' for an
> update-form memory reference, or an 'x' for an indexed-form memory
> reference.  However, these are really only useful in GCC internal code
> generation.  In inline asm the operand of the memory constraint is
> typically just a register containing the address, so 'U' and 'X' make
> no sense.
>
> This patch quietly accepts 'U' and 'X' in inline asm patterns, but
> otherwise does nothing.  If we ever unexpectedly see a non-register,
> we'll assert and sort it out afterwards.
>
> I've added a new test for these constraints; the test case should be
> used for other asm-constraints changes down the road.
>
> Added:
>     llvm/trunk/test/CodeGen/PowerPC/asm-constraints.ll
> Modified:
>     llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> PowerPC/PPCAsmPrinter.cpp?rev=217622&r1=217621&r2=217622&view=diff
> ============================================================
> ==================
> --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Thu Sep 11 15:10:03
> 2014
> @@ -275,6 +275,16 @@ bool PPCAsmPrinter::PrintAsmMemoryOperan
>          printOperand(MI, OpNo, O);
>          return false;
>        }
> +    case 'U': // Print 'u' for update form.
> +    case 'X': // Print 'x' for indexed form.
> +      {
> +       // Memory constraints should always produce an MO_Register,
> +       // so we never get an update or indexed form.  (In GCC, these
> +       // are useful in internal code gen; not so much in inline asm.)
> +       // So tolerate these but don't output anything.
> +       assert(MI->getOperand(OpNo).isReg());
> +       return false;
> +      }
>      }
>    }
>
>
> Added: llvm/trunk/test/CodeGen/PowerPC/asm-constraints.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/PowerPC/asm-constraints.ll?rev=217622&view=auto
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/PowerPC/asm-constraints.ll (added)
> +++ llvm/trunk/test/CodeGen/PowerPC/asm-constraints.ll Thu Sep 11
> 15:10:03 2014
> @@ -0,0 +1,32 @@
> +; RUN llc < %s -mcpu=pwr8 | FileCheck %s
> +
> +target datalayout = "e-m:e-i64:64-n32:64"
> +target triple = "powerpc64le-unknown-linux-gnu"
> +
> +; Function Attrs: nounwind
> +; Check that we accept 'U' and 'X' constraints.
> +define void @foo(i32 signext %result, i8* %addr) #0 {
> +entry:
> +  %result.addr = alloca i32, align 4
> +  %addr.addr = alloca i8*, align 8
> +  store i32 %result, i32* %result.addr, align 4
> +  store i8* %addr, i8** %addr.addr, align 8
> +  %0 = load i8** %addr.addr, align 8
> +  %1 = call i32 asm sideeffect "ld${1:U}${1:X} $0,$1\0Acmpw $0,$0\0Abne-
> 1f\0A1: isync\0A", "=r,*m,~{memory},~{cr0}"(i8* %0) #1, !srcloc !1
> +  store i32 %1, i32* %result.addr, align 4
> +  ret void
> +}
> +
> +; CHECK-LABEL: @foo
> +; CHECK: ld [[REG:[0-9]+]],0(4)
> +; CHECK-NEXT: cmpw [[REG]],[[REG]]
> +; CHECK-NEXT: bne- 1f
> +; CHECK-NEXT: 1: isync
> +
> +attributes #0 = { nounwind "less-precise-fpmad"="false"
> "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"
> "no-infs-fp-math"="false" "no-nans-fp-math"="false"
> "stack-protector-buffer-size"="8" "unsafe-fp-math"="false"
> "use-soft-float"="false" }
> +attributes #1 = { nounwind }
> +
> +!llvm.ident = !{!0}
> +
> +!0 = metadata !{metadata !"clang version 3.6.0 (trunk 217557)"}
> +!1 = metadata !{i32 67, i32 91, i32 110, i32 126}
>
>
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