[llvm] r217561 - R600/SI: Fix losing chain when fixing reg class of loads.

[Matt Arsenault]

Author: arsenm
Date: Wed Sep 10 18:26:19 2014
New Revision: 217561

URL: http://llvm.org/viewvc/llvm-project?rev=217561&view=rev
Log:
R600/SI: Fix losing chain when fixing reg class of loads.

The lost chain resulting in earlier side effecting nodes
being deleted.

Added:
    llvm/trunk/test/CodeGen/R600/missing-store.ll
Modified:
    llvm/trunk/lib/Target/R600/SIISelLowering.cpp

Modified: llvm/trunk/lib/Target/R600/SIISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIISelLowering.cpp?rev=217561&r1=217560&r2=217561&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/SIISelLowering.cpp Wed Sep 10 18:26:19 2014
@@ -2004,12 +2004,20 @@ MachineSDNode *SITargetLowering::AdjustR
       return N;
     }
     ConstantSDNode *Offset = cast<ConstantSDNode>(N->getOperand(1));
-    SDValue Ops[] = {
-      SDValue(DAG.getMachineNode(AMDGPU::SI_ADDR64_RSRC, DL, MVT::i128,
-                                 DAG.getConstant(0, MVT::i64)), 0),
-      N->getOperand(0),
-      DAG.getConstant(Offset->getSExtValue() << 2, MVT::i32)
-    };
+    MachineSDNode *RSrc = DAG.getMachineNode(AMDGPU::SI_ADDR64_RSRC, DL,
+                                             MVT::i128,
+                                             DAG.getConstant(0, MVT::i64));
+
+    SmallVector<SDValue, 8> Ops;
+    Ops.push_back(SDValue(RSrc, 0));
+    Ops.push_back(N->getOperand(0));
+    Ops.push_back(DAG.getConstant(Offset->getSExtValue() << 2, MVT::i32));
+
+    // Copy remaining operands so we keep any chain and glue nodes that follow
+    // the normal operands.
+    for (unsigned I = 2, E = N->getNumOperands(); I != E; ++I)
+      Ops.push_back(N->getOperand(I));
+
     return DAG.getMachineNode(NewOpcode, DL, N->getVTList(), Ops);
   }
   }

Added: llvm/trunk/test/CodeGen/R600/missing-store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/missing-store.ll?rev=217561&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/R600/missing-store.ll (added)
+++ llvm/trunk/test/CodeGen/R600/missing-store.ll Wed Sep 10 18:26:19 2014
@@ -0,0 +1,26 @@
+; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=FUNC -check-prefix=SI %s
+
+ at ptr_load = addrspace(3) global i32 addrspace(2)* null, align 8
+
+; Make sure when the load from %ptr2 is folded the chain isn't lost,
+; resulting in losing the store to gptr
+
+; FUNC-LABEL: @missing_store_reduced
+; SI: DS_READ_B64
+; SI: BUFFER_STORE_DWORD
+; SI: BUFFER_LOAD_DWORD
+; SI: BUFFER_STORE_DWORD
+; SI: S_ENDPGM
+define void @missing_store_reduced(i32 addrspace(1)* %out, i32 addrspace(1)* %gptr) #0 {
+  %ptr0 = load i32 addrspace(2)* addrspace(3)* @ptr_load, align 8
+  %ptr2 = getelementptr inbounds i32 addrspace(2)* %ptr0, i64 2
+
+  store i32 99, i32 addrspace(1)* %gptr, align 4
+  %tmp2 = load i32 addrspace(2)* %ptr2, align 4
+
+  store i32 %tmp2, i32 addrspace(1)* %out, align 4
+  ret void
+}
+
+attributes #0 = { nounwind }
+