[llvm] r217380 - R600/SI: Fix assertion from copying a TargetGlobalAddress
Matt Arsenault
Matthew.Arsenault at amd.com
Mon Sep 8 08:07:33 PDT 2014
Author: arsenm
Date: Mon Sep 8 10:07:33 2014
New Revision: 217380
URL: http://llvm.org/viewvc/llvm-project?rev=217380&view=rev
Log:
R600/SI: Fix assertion from copying a TargetGlobalAddress
Assert in scheduler from an inserted copy_to_regclass from
a constant.
This only seems to break sometimes when a constant initializer
address is forced into VGPRs in a non-entry block. No test
since the only case I've managed to hit only happens with a future
patch, and that case will also not be a problem once scalar instructions
are used in non-entry blocks.
Modified:
llvm/trunk/lib/Target/R600/SIISelLowering.cpp
Modified: llvm/trunk/lib/Target/R600/SIISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIISelLowering.cpp?rev=217380&r1=217379&r2=217380&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/SIISelLowering.cpp Mon Sep 8 10:07:33 2014
@@ -1641,7 +1641,8 @@ void SITargetLowering::ensureSRegLimit(S
SDNode *Node;
// We can't use COPY_TO_REGCLASS with FrameIndex arguments.
- if (isa<FrameIndexSDNode>(Operand)) {
+ if (isa<FrameIndexSDNode>(Operand) ||
+ isa<GlobalAddressSDNode>(Operand)) {
unsigned Opcode = Operand.getValueType() == MVT::i32 ?
AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;
Node = DAG.getMachineNode(Opcode, SDLoc(), Operand.getValueType(),
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