[PATCH] [Power] Use AtomicExpandPass for fence insertion, and use lwsync where appropriate
hfinkel at anl.gov
hfinkel at anl.gov
Thu Sep 4 08:30:46 PDT 2014
================
Comment at: lib/Target/PowerPC/PPCISelLowering.h:412
@@ +411,3 @@
+ Instruction* emitLeadingFence(IRBuilder<> &Builder, AtomicOrdering Ord,
+ bool IsStore, bool IsLoad) const override;
+ Instruction* emitTrailingFence(IRBuilder<> &Builder, AtomicOrdering Ord,
----------------
The indentation here seems odd.
================
Comment at: lib/Target/PowerPC/PPCISelLowering.h:414
@@ +413,3 @@
+ Instruction* emitTrailingFence(IRBuilder<> &Builder, AtomicOrdering Ord,
+ bool IsStore, bool IsLoad) const override;
+
----------------
Here too.
================
Comment at: lib/Target/PowerPC/PPCInstrInfo.td:1710
@@ -1709,1 +1709,3 @@
+def : Pat<(int_ppc_sync), (MSYNC)>, Requires<[IsBookE]>;
+def : Pat<(int_ppc_lwsync), (MSYNC)>, Requires<[IsBookE]>;
----------------
This is correct, as such, but should really be enhanced. The PPC A2, for example, supports SYNC (even though it is a Book E processor), such that MSYNC is really just SYNC 0. Older Book E designs, like the PPC 440, only support MSYNC. We'll want to split SYNC support into its own feature.
================
Comment at: lib/Target/PowerPC/PPCTargetMachine.cpp:105
@@ +104,3 @@
+ addPass(createAtomicExpandPass(&getPPCTargetMachine()));
+
+ TargetPassConfig::addIRPasses();
----------------
Don't need a blank line here.
http://reviews.llvm.org/D5180
More information about the llvm-commits
mailing list