[PATCH] Preserve IR flags (nsw, nuw, exact, fast-math) in SLP vectorizer (PR20802)

[Sanjay Patel]

Hi nadav, aschwaighofer, hfinkel, karthikthecool, andreadb,

The SLP vectorizer should propagate IR-level optimization hints/flags (nsw, nuw, exact, fast-math) when converting scalar instructions into vectors. But this isn't a simple copy - we need to take the intersection (the logical 'and') of the sets of flags on the scalars.

The solution is further complicated because we can have non-uniform (non-SIMD) vector ops after:
http://reviews.llvm.org/D4015
http://llvm.org/viewvc/llvm-project?view=revision&revision=211339

The vast majority of changed files are existing tests that were not propagating IR flags, but I've also added a new test file for focused testing of IR flag possibilities.

http://reviews.llvm.org/D5172

Files:
  lib/Transforms/Vectorize/SLPVectorizer.cpp
  test/Transforms/SLPVectorizer/AArch64/commute.ll
  test/Transforms/SLPVectorizer/ARM/sroa.ll
  test/Transforms/SLPVectorizer/X86/addsub.ll
  test/Transforms/SLPVectorizer/X86/cycle_dup.ll
  test/Transforms/SLPVectorizer/X86/hoist.ll
  test/Transforms/SLPVectorizer/X86/horizontal.ll
  test/Transforms/SLPVectorizer/X86/loopinvariant.ll
  test/Transforms/SLPVectorizer/X86/multi_user.ll
  test/Transforms/SLPVectorizer/X86/powof2div.ll
  test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
  test/Transforms/SLPVectorizer/X86/saxpy.ll
  test/Transforms/SLPVectorizer/X86/scheduling.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D5172.13212.patch
Type: text/x-patch
Size: 20903 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20140903/f87818dd/attachment.bin>