[llvm] r216897 - [PowerPC] Guard against illegal selection of add for TargetConstant operands

Hal Finkel hfinkel at anl.gov
Mon Sep 1 23:23:54 PDT 2014


Author: hfinkel
Date: Tue Sep  2 01:23:54 2014
New Revision: 216897

URL: http://llvm.org/viewvc/llvm-project?rev=216897&view=rev
Log:
[PowerPC] Guard against illegal selection of add for TargetConstant operands

r208640 was reverted because it caused a self-hosting failure on ppc64. The
underlying cause was the formation of ISD::ADD nodes with ISD::TargetConstant
operands. Because we have no patterns for 'add' taking 'timm' nodes, these are
selected as r+r add instructions (which is a miscompile). Guard against this
kind of behavior in the future by making the backend crash should this occur
(instead of silently generating invalid output).

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=216897&r1=216896&r2=216897&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Tue Sep  2 01:23:54 2014
@@ -908,6 +908,13 @@ SDNode *PPCDAGToDAGISel::Select(SDNode *
     return nullptr;   // Already selected.
   }
 
+  // In case any misguided DAG-level optimizations form an ADD with a
+  // TargetConstant operand, crash here instead of miscompiling (by selecting
+  // an r+r add instead of some kind of r+i add).
+  if (N->getOpcode() == ISD::ADD &&
+      N->getOperand(1).getOpcode() == ISD::TargetConstant)
+    llvm_unreachable("Invalid ADD with TargetConstant operand");
+
   switch (N->getOpcode()) {
   default: break;
 





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