[llvm] r216746 - [ARM] Add Thumb-2 code size optimization test for ASR (register).
Tilmann Scheller
t.scheller at samsung.com
Fri Aug 29 10:19:01 PDT 2014
Author: tilmann
Date: Fri Aug 29 12:19:00 2014
New Revision: 216746
URL: http://llvm.org/viewvc/llvm-project?rev=216746&view=rev
Log:
[ARM] Add Thumb-2 code size optimization test for ASR (register).
Modified:
llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll
Modified: llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll?rev=216746&r1=216745&r2=216746&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll Fri Aug 29 12:19:00 2014
@@ -18,3 +18,12 @@ entry:
%shr = ashr i32 %a, 13
ret i32 %shr
}
+
+define i32 @asr-reg(i32 %a, i32 %b) nounwind readnone {
+; CHECK-LABEL: "asr-reg":
+; CHECK: asr.w r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} @ encoding: [{{0x..,0x..,0x..,0x..}}]
+; CHECK-OPT: asrs r{{[0-7]}}, r{{[0-7]}} @ encoding: [{{0x..,0x..}}]
+entry:
+ %shr = ashr i32 %a, %b
+ ret i32 %shr
+}
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