[llvm] r216744 - [ARM] Add Thumb-2 code size optimization test for ASR (immediate).

Tilmann Scheller t.scheller at samsung.com
Fri Aug 29 10:02:28 PDT 2014


Author: tilmann
Date: Fri Aug 29 12:02:28 2014
New Revision: 216744

URL: http://llvm.org/viewvc/llvm-project?rev=216744&view=rev
Log:
[ARM] Add Thumb-2 code size optimization test for ASR (immediate).

Modified:
    llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll

Modified: llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll?rev=216744&r1=216743&r2=216744&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll Fri Aug 29 12:02:28 2014
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=thumbv7-linux-gnueabihf -o - -show-mc-encoding -t2-reduce-limit2=0 %s | FileCheck %s
+; RUN: llc -mtriple=thumbv7-linux-gnueabihf -o - -show-mc-encoding -t2-reduce-limit=0 -t2-reduce-limit2=0 %s | FileCheck %s
 ; RUN: llc -mtriple=thumbv7-linux-gnueabihf -o - -show-mc-encoding %s | FileCheck %s --check-prefix=CHECK-OPT
 
 define i32 @and(i32 %a, i32 %b) nounwind readnone {
@@ -10,3 +10,11 @@ entry:
   ret i32 %and
 }
 
+define i32 @asr-imm(i32 %a) nounwind readnone {
+; CHECK-LABEL: "asr-imm":
+; CHECK: asr.w r{{[0-9]+}}, r{{[0-9]+}}, #13 @ encoding: [{{0x..,0x..,0x..,0x..}}]
+; CHECK-OPT: asrs r{{[0-7]}}, r{{[0-7]}}, #13 @ encoding: [{{0x..,0x..}}]
+entry:
+  %shr = ashr i32 %a, 13
+  ret i32 %shr
+}





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