[PATCH] ARM: Improve handling of the Thumb2 M-class MSR instruction

Renato Golin renato.golin at linaro.org
Tue Aug 26 03:58:56 PDT 2014


Hi Petr,

Some comments inline, but otherwise looks good.

Thanks,
--renato

================
Comment at: lib/Target/ARM/ARMInstrThumb2.td:4023
@@ -4022,2 +4022,3 @@
   let Inst{19-16} = 0b1111;
   let Inst{7-0} = mask;
+
----------------
I know it was there before, but this "mask" could also be called "SYSm" for consistency

================
Comment at: lib/Target/ARM/ARMInstrThumb2.td:4025
@@ +4024,3 @@
+
+  let Unpredictable{20-16} = 0b11111;
+  let Unpredictable{13} = 0b1;
----------------
Isn't this the same as saying:

    let Unpredictable{20} = 0b1


================
Comment at: lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp:817
@@ +816,3 @@
+    // For writes, handle extended mask bits if the DSP extension is present.
+    if (Opcode == ARM::t2MSR_M && (FeatureBits & ARM::FeatureDSPThumb2)) {
+      switch (SYSm) {
----------------
Was the t2MRS_M a typo? I'm surprised it worked at all...

http://reviews.llvm.org/D4979






More information about the llvm-commits mailing list