[Thumb1] Improve base + offset materialization in the load/store optimizer

[Moritz Roth]

Forgot to add llvm-commits to the revision - sorry about that.

-----Original Message-----
From: Moritz Roth [mailto:moritz.roth at arm.com]
Sent: 21 August 2014 14:44
To: Moritz Roth; renato.golin at linaro.org
Cc: t.p.northover at gmail.com
Subject: [PATCH] [Thumb1] Improve base + offset materialization in the load/store optimizer

Hi rengolin,

This patch improves the instruction sequence the load/store optimizer emits to materialize a new base register with offset applied.

If we have a chain of loads/stores like this:

ldr r0, [r5, #4]
ldr r1, [r5, #8]
ldr r2, [r5, #12]

The pass will always use a MOV and 8-bit immediate add (source and destination register are the same in tADDi8) to get a new base:
mov r2, r5
adds r2, #4
ldm r2, {r0, r1, r2}

However, if the immediate fits into 3 bits, as in this case, we can actually generate (with tADDi3):
adds r2, r5, #4
ldm r2, {r0, r1, r2}

I’ve also added a test case for this and made two existing load/store optimizer tests run with –verify-machineinstrs to catch any problems.

Cheers
Moritz

http://reviews.llvm.org/D5006

Files:
  lib/Target/ARM/ARMLoadStoreOptimizer.cpp
  test/CodeGen/Thumb/ldm-stm-base-materialization.ll
  test/CodeGen/Thumb/thumb-ldm.ll
  test/CodeGen/Thumb/thumb-memcpy-ldm-stm.ll

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