[PATCH] don't prevent a vselect of constants from becoming a single load (PR20648)
Sanjay Patel
spatel at rotateright.com
Wed Aug 20 13:44:24 PDT 2014
Closed by commit rL216121 (authored by @spatel).
REPOSITORY
rL LLVM
http://reviews.llvm.org/D4934
Files:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/sse41-blend.ll
Index: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
@@ -10416,6 +10416,13 @@
}
SDValue X86TargetLowering::LowerVSELECT(SDValue Op, SelectionDAG &DAG) const {
+ // A vselect where all conditions and data are constants can be optimized into
+ // a single vector load by SelectionDAGLegalize::ExpandBUILD_VECTOR().
+ if (ISD::isBuildVectorOfConstantSDNodes(Op.getOperand(0).getNode()) &&
+ ISD::isBuildVectorOfConstantSDNodes(Op.getOperand(1).getNode()) &&
+ ISD::isBuildVectorOfConstantSDNodes(Op.getOperand(2).getNode()))
+ return SDValue();
+
SDValue BlendOp = LowerVSELECTtoBlend(Op, Subtarget, DAG);
if (BlendOp.getNode())
return BlendOp;
@@ -20419,6 +20426,12 @@
if (!ISD::isBuildVectorOfConstantSDNodes(Cond.getNode()))
return SDValue();
+ // A vselect where all conditions and data are constants can be optimized into
+ // a single vector load by SelectionDAGLegalize::ExpandBUILD_VECTOR().
+ if (ISD::isBuildVectorOfConstantSDNodes(LHS.getNode()) &&
+ ISD::isBuildVectorOfConstantSDNodes(RHS.getNode()))
+ return SDValue();
+
unsigned MaskValue = 0;
if (!BUILD_VECTORtoBlendMask(cast<BuildVectorSDNode>(Cond), MaskValue))
return SDValue();
Index: llvm/trunk/test/CodeGen/X86/sse41-blend.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/sse41-blend.ll
+++ llvm/trunk/test/CodeGen/X86/sse41-blend.ll
@@ -138,3 +138,13 @@
%1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 9, i32 10, i32 3, i32 4, i32 5, i32 6, i32 15>
ret <8 x i16> %1
}
+
+; PR20648 - a blend of constants isn't really a blend; it's just a constant pool load.
+; CHECK-LABEL: @does_not_blend
+; CHECK: movaps
+; CHECK-NEXT: ret
+define <4 x i32> @does_not_blend() {
+ %select = select <4 x i1> <i1 1, i1 0, i1 0, i1 1>, <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
+ ret <4 x i32> %select
+}
+
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